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authorPaul Mundt <lethal@linux-sh.org>2010-02-03 16:46:20 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-02-03 16:46:20 +0900
commit9ad62ec4f752c82b39aa5927f23d894b46ae10b9 (patch)
tree546f4572329478e849408fe129e44625881f9992 /arch/sh/include
parent37feecb0ae8c29b713b957c053b05ad10c42c73b (diff)
sh: Fix up early PCI PERR/SERR IRQ handling.
This adds support for handling early PERR/SERR triggering in between controller registration and the initial bus scan. Buggy cards end up asserting these as soon as the M66EN scan is undertaken, resulting in an early crash. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r--arch/sh/include/asm/pci.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index 6d762cca231..1042f7f0a48 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -41,6 +41,18 @@ extern int register_pci_controller(struct pci_channel *hose);
extern void pcibios_report_status(unsigned int status_mask, int warn);
/* arch/sh/drivers/pci/common.c */
+extern int early_read_config_byte(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u8 *value);
+extern int early_read_config_word(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u16 *value);
+extern int early_read_config_dword(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u32 *value);
+extern int early_write_config_byte(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u8 value);
+extern int early_write_config_word(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u16 value);
+extern int early_write_config_dword(struct pci_channel *hose, int top_bus,
+ int bus, int devfn, int offset, u32 value);
extern void pcibios_enable_timers(struct pci_channel *hose);
extern unsigned int pcibios_handle_status_errors(unsigned long addr,
unsigned int status, struct pci_channel *hose);