diff options
author | Carl Shaw <carl.shaw@st.com> | 2008-09-05 16:36:19 +0900 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-09-08 10:35:05 +0900 |
commit | b6ad1e8c3f76fcc5dee506d5e79e752d296ff745 (patch) | |
tree | c626da55bdfc3e19419856e086a5cad1dc4829c4 /arch/sh/kernel/cpu/sh4/softfloat.c | |
parent | f040ddaf4cfd28f25ea9d6a42d3c734d5c3f6798 (diff) |
sh: Subnormal double to float conversion
This patch adds support for the SH4 to convert a subnormal double
into a float by catching the FPE and implementing the FCNVDS
instruction in software.
Signed-off-by: Carl Shaw <carl.shaw@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4/softfloat.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4/softfloat.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c index 828cb57cb95..2b747f3b02b 100644 --- a/arch/sh/kernel/cpu/sh4/softfloat.c +++ b/arch/sh/kernel/cpu/sh4/softfloat.c @@ -85,6 +85,7 @@ float64 float64_div(float64 a, float64 b); float32 float32_div(float32 a, float32 b); float32 float32_mul(float32 a, float32 b); float64 float64_mul(float64 a, float64 b); +float32 float64_to_float32(float64 a); inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, bits64 * z1Ptr); inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, @@ -890,3 +891,31 @@ float64 float64_mul(float64 a, float64 b) } return roundAndPackFloat64(zSign, zExp, zSig0); } + +/* + * ------------------------------------------------------------------------------- + * Returns the result of converting the double-precision floating-point value + * `a' to the single-precision floating-point format. The conversion is + * performed according to the IEC/IEEE Standard for Binary Floating-point + * Arithmetic. + * ------------------------------------------------------------------------------- + * */ +float32 float64_to_float32(float64 a) +{ + flag aSign; + int16 aExp; + bits64 aSig; + bits32 zSig; + + aSig = extractFloat64Frac( a ); + aExp = extractFloat64Exp( a ); + aSign = extractFloat64Sign( a ); + + shift64RightJamming( aSig, 22, &aSig ); + zSig = aSig; + if ( aExp || zSig ) { + zSig |= 0x40000000; + aExp -= 0x381; + } + return roundAndPackFloat32(aSign, aExp, zSig); +} |