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authorPaul Mundt <lethal@linux-sh.org>2006-12-25 09:51:47 +0900
committerPaul Mundt <lethal@linux-sh.org>2007-02-13 10:54:45 +0900
commitaec5e0e1c179fac4bbca4007a3f0d3107275a73c (patch)
tree3b251e52a89445a5546f398fb16a002435b6c2b6 /arch/sh/kernel/cpu
parent506b85f4114b912d2e91fab8da9849289e43857f (diff)
sh: Use a per-cpu ASID cache.
Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r--arch/sh/kernel/cpu/init.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 48121766e8d..6c3c7687e81 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -3,7 +3,7 @@
*
* CPU init code
*
- * Copyright (C) 2002, 2003 Paul Mundt
+ * Copyright (C) 2002 - 2006 Paul Mundt
* Copyright (C) 2003 Richard Curnow
*
* This file is subject to the terms and conditions of the GNU General Public
@@ -12,6 +12,8 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <asm/mmu_context.h>
#include <asm/processor.h>
#include <asm/uaccess.h>
#include <asm/page.h>
@@ -218,6 +220,12 @@ asmlinkage void __init sh_cpu_init(void)
clear_used_math();
}
+ /*
+ * Initialize the per-CPU ASID cache very early, since the
+ * TLB flushing routines depend on this being setup.
+ */
+ current_cpu_data.asid_cache = NO_CONTEXT;
+
#ifdef CONFIG_SH_DSP
/* Probe for DSP */
dsp_init();
@@ -240,4 +248,3 @@ asmlinkage void __init sh_cpu_init(void)
ubc_wakeup();
#endif
}
-