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authorPaul Mundt <lethal@linux-sh.org>2009-04-17 16:38:00 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-04-17 16:38:00 +0900
commitc66c1d79a94a7a302e2dc6c93da40902423eac3e (patch)
treee29bf59d813f623b3a71f5ccb2d0f8ac16fec051 /arch/sh/lib/lshrdi3.c
parentab78cbcf6877334fc20868b7df7887349e2e01c8 (diff)
sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register.
The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/lib/lshrdi3.c')
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