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authorMarc Zyngier <maz@misterjones.org>2008-10-15 12:54:05 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-15 13:01:36 +0100
commita9ff8f6462635c8d9f8d64b7b10ddcea8404d77b (patch)
tree0264af3d9285b706a5d8399edf09ea34028183a5 /arch/sparc64
parentaf2010daf7538b1483280f7aefffe4bff67696c0 (diff)
[ARM] 5308/1: Fix Viper ISA IRQ handling
The ISA IRQ renumbering broke the Viper ISA code in interesting ways. It originally assumed that ISA interrupt were numbered in the order that is defined by the CPLD registers. Unfortunately, this is no longer the case. Furthermore, the viper_irq_handler() function being a chained IRQ handler, it must ACK the interrupt by itself, or the handler will be immediately reentered, with the expected damages. This fix was made possible thanks to the help of David Raeman, who provided debug information and tested each version of this patch. Tested-by: David Raeman <david.raeman@gmail.com> Signed-off-by: Marc Zyngier <maz@misterjones.org> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/sparc64')
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