diff options
| author | Yinghai Lu <Yinghai.Lu@Sun.COM> | 2008-01-30 13:33:32 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:33:32 +0100 |
| commit | 093af8d7f0ba3c6be1485973508584ef081e9f93 (patch) | |
| tree | 0a2db2401e09764e654efafbea60f6d5d6894dcd /arch/x86/kernel/cpu/mtrr | |
| parent | 11201e603d28a1cb7a4bb1d65f39e61629c97a28 (diff) | |
x86_32: trim memory by updating e820
when MTRRs are not covering the whole e820 table, we need to trim the
RAM and need to update e820.
reuse some code on 64-bit as well.
here need to add early_get_cap and use it in early_cpu_detect, and move
mtrr_bp_init early.
The code successfully trimmed the memory map on Justin's system:
from:
[ 0.000000] BIOS-e820: 0000000100000000 - 000000022c000000 (usable)
to:
[ 0.000000] modified: 0000000100000000 - 0000000228000000 (usable)
[ 0.000000] modified: 0000000228000000 - 000000022c000000 (reserved)
According to Justin it makes quite a difference:
| When I boot the box without any trimming it acts like a 286 or 386,
| takes about 10 minutes to boot (using raptor disks).
Signed-off-by: Yinghai Lu <yinghai.lu@sun.com>
Tested-by: Justin Piszcz <jpiszcz@lucidpixels.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu/mtrr')
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/main.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index ccd36ed2187..ac4b6338f3f 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c @@ -624,7 +624,6 @@ static struct sysdev_driver mtrr_sysdev_driver = { .resume = mtrr_restore, }; -#ifdef CONFIG_X86_64 static int disable_mtrr_trim; static int __init disable_mtrr_trim_setup(char *str) @@ -643,13 +642,10 @@ early_param("disable_mtrr_trim", disable_mtrr_trim_setup); #define Tom2Enabled (1U << 21) #define Tom2ForceMemTypeWB (1U << 22) -static __init int amd_special_default_mtrr(unsigned long end_pfn) +static __init int amd_special_default_mtrr(void) { u32 l, h; - /* Doesn't apply to memory < 4GB */ - if (end_pfn <= (0xffffffff >> PAGE_SHIFT)) - return 0; if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) return 0; if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11) @@ -687,9 +683,14 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) * Make sure we only trim uncachable memory on machines that * support the Intel MTRR architecture: */ + if (!is_cpu(INTEL) || disable_mtrr_trim) + return 0; rdmsr(MTRRdefType_MSR, def, dummy); def &= 0xff; - if (!is_cpu(INTEL) || disable_mtrr_trim || def != MTRR_TYPE_UNCACHABLE) + if (def != MTRR_TYPE_UNCACHABLE) + return 0; + + if (amd_special_default_mtrr()) return 0; /* Find highest cached pfn */ @@ -703,8 +704,14 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) highest_addr = base + size; } - if (amd_special_default_mtrr(end_pfn)) + /* kvm/qemu doesn't have mtrr set right, don't trim them all */ + if (!highest_addr) { + printk(KERN_WARNING "***************\n"); + printk(KERN_WARNING "**** WARNING: likely strange cpu\n"); + printk(KERN_WARNING "**** MTRRs all blank, cpu in qemu?\n"); + printk(KERN_WARNING "***************\n"); return 0; + } if ((highest_addr >> PAGE_SHIFT) < end_pfn) { printk(KERN_WARNING "***************\n"); @@ -726,7 +733,6 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) return 0; } -#endif /** * mtrr_bp_init - initialize mtrrs on the boot CPU |