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authorTakashi Iwai <tiwai@suse.de>2008-12-24 11:04:08 +0100
committerTakashi Iwai <tiwai@suse.de>2008-12-24 11:04:08 +0100
commit7645c4bfbb36f357f03815f5729c46ce8d89f008 (patch)
treeeb2c45bbdfc715a9a6e96e6af9675a0440ef8ff1 /arch/x86/kernel/microcode_intel.c
parent74b7ff48a93f44198ac03cc4e628d713f53d4668 (diff)
parent574f3c4f5c55e99ea60f71fd98cc54931d4b2eae (diff)
Merge branch 'fix/hda' into topic/hda
Diffstat (limited to 'arch/x86/kernel/microcode_intel.c')
-rw-r--r--arch/x86/kernel/microcode_intel.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 622dc4a2178..a8e62792d17 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock);
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
{
struct cpuinfo_x86 *c = &cpu_data(cpu_num);
+ unsigned long flags;
unsigned int val[2];
memset(csig, 0, sizeof(*csig));
@@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
csig->pf = 1 << ((val[1] >> 18) & 7);
}
+ /* serialize access to the physical write to MSR 0x79 */
+ spin_lock_irqsave(&microcode_update_lock, flags);
+
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
/* see notes above for revision 1.07. Apparent chip bug */
sync_core();
/* get the current revision from MSR 0x8B */
rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
+ spin_unlock_irqrestore(&microcode_update_lock, flags);
+
pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
csig->sig, csig->pf, csig->rev);