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authorJoerg Roedel <joerg.roedel@amd.com>2008-12-02 20:16:03 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-02 20:25:52 +0100
commitdcb7731a185efbf3d800618d874af99895df5afb (patch)
tree8730ff765213c91ba65da2520fa0e82178509f0e /arch/x86/kernel
parent50cec5c51c18301ff60262fdbe920f4a907c9d81 (diff)
x86: fix broken flushing in GART nofullflush path
Impact: remove stale IOTLB entries In the non-default nofullflush case the GART is only flushed when next_bit wraps around. But it can happen that an unmap operation unmaps memory which is behind the current next_bit location. If these addresses are reused it may result in stale GART IO/TLB entries. Fix this by setting the GART next_bit always behind an unmapped location. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/pci-gart_64.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index a42b02b4df6..ba7ad83e20a 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -123,6 +123,8 @@ static void free_iommu(unsigned long offset, int size)
spin_lock_irqsave(&iommu_bitmap_lock, flags);
iommu_area_free(iommu_gart_bitmap, offset, size);
+ if (offset >= next_bit)
+ next_bit = offset + size;
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
}