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authorArnd Bergmann <arnd.bergmann@de.ibm.com>2006-03-24 19:49:27 +0100
committerPaul Mackerras <paulus@samba.org>2006-03-27 14:48:44 +1100
commit79c227a92ce9fe0504e9c4aaadf3bfacb0f5f45e (patch)
tree3e674a8ec79bd170a86e1c5544948d267b381346 /arch
parent47952d5ea67dc7098667a954483a82acf81eb4da (diff)
[PATCH] spufs: Fix endless protection fault on LS writes by SPE.
If an SPE attempts a DMA put to a local store after already doing a get, the kernel must update the HW PTE to allow the write access. This case was not being handled correctly. From: Mike Kistler <mkistler@us.ibm.com> Signed-off-by: Mike Kistler <mkistler@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index d152a3fbdb8..269dda4fd0b 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -486,14 +486,13 @@ int spu_irq_class_1_bottom(struct spu *spu)
ea = spu->dar;
dsisr = spu->dsisr;
- if (dsisr & MFC_DSISR_PTE_NOT_FOUND) {
+ if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
access = (_PAGE_PRESENT | _PAGE_USER);
access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
if (hash_page(ea, access, 0x300) != 0)
error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
}
- if ((error & CLASS1_ENABLE_STORAGE_FAULT_INTR) ||
- (dsisr & MFC_DSISR_ACCESS_DENIED)) {
+ if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
if ((ret = spu_handle_mm_fault(spu)) != 0)
error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
else