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authorJan Beulich <jbeulich@novell.com>2008-04-22 16:28:41 +0100
committerIngo Molnar <mingo@elte.hu>2008-04-26 17:35:46 +0200
commit86d78f640257344cc90a50da8cd52297ba1c6bdf (patch)
tree0d19a04db723148b9e4fddbbdf6407126f167755 /arch
parentb11caa7c7063ea92a0a58115d3fc6d038ed89510 (diff)
x86: fix watchdog ops for CoreDuo
There apparently was an unnoticed conflict between an earlier patch to this file and mine (d1e084746b0e5806e6345ab31c5b370f8dee2b23), which I noticed only now. I suppose a change like the one below (untested) is needed; I didn't get any response on a confirmation request for this from the submitter of the first patch. The issue is the writing of the 'checkbit' member at the end of setup_intel_arch_watchdog(), which my patch made go to intel_arch_wd_ops rather than wd_ops. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perfctr-watchdog.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index b943e10ad81..f9ae93adffe 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -614,16 +614,6 @@ static struct wd_ops intel_arch_wd_ops __read_mostly = {
.evntsel = MSR_ARCH_PERFMON_EVENTSEL1,
};
-static struct wd_ops coreduo_wd_ops = {
- .reserve = single_msr_reserve,
- .unreserve = single_msr_unreserve,
- .setup = setup_intel_arch_watchdog,
- .rearm = p6_rearm,
- .stop = single_msr_stop_watchdog,
- .perfctr = MSR_ARCH_PERFMON_PERFCTR0,
- .evntsel = MSR_ARCH_PERFMON_EVENTSEL0,
-};
-
static void probe_nmi_watchdog(void)
{
switch (boot_cpu_data.x86_vendor) {
@@ -637,8 +627,8 @@ static void probe_nmi_watchdog(void)
/* Work around Core Duo (Yonah) errata AE49 where perfctr1
doesn't have a working enable bit. */
if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 14) {
- wd_ops = &coreduo_wd_ops;
- break;
+ intel_arch_wd_ops.perfctr = MSR_ARCH_PERFMON_PERFCTR0;
+ intel_arch_wd_ops.evntsel = MSR_ARCH_PERFMON_EVENTSEL0;
}
if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
wd_ops = &intel_arch_wd_ops;