diff options
author | Tony Luck <tony.luck@intel.com> | 2007-06-28 16:05:34 -0700 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2007-07-09 10:30:28 -0700 |
commit | 83ce6ef8408bbc7d9322ab50ba592f83012dea94 (patch) | |
tree | 46fe432c39860e7b46d622ab306494613b29b8ae /arch | |
parent | 7dcca30a32aadb0520417521b0c44f42d09fe05c (diff) |
[IA64] Don't set psr.ic and psr.i simultaneously
It's not a good idea to use "ssm psr.ic | psr.i" to simultaneously
enable interrupts and interrupt state collection, the two bits can
take effect asynchronously, so it is possible for an interrupt to
be serviced while psr.ic is still zero.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/ia64/kernel/mca_drv_asm.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/ia64/kernel/mca_drv_asm.S b/arch/ia64/kernel/mca_drv_asm.S index f2d4900751b..3bccb06c8d2 100644 --- a/arch/ia64/kernel/mca_drv_asm.S +++ b/arch/ia64/kernel/mca_drv_asm.S @@ -40,7 +40,11 @@ GLOBAL_ENTRY(mca_handler_bhhook) mov b6=loc1 ;; mov loc1=rp - ssm psr.i | psr.ic + ssm psr.ic + ;; + srlz.i + ;; + ssm psr.i br.call.sptk.many rp=b6 // does not return ... ;; mov ar.pfs=loc0 |