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authorHeiko Carstens <heiko.carstens@de.ibm.com>2010-02-26 22:37:33 +0100
committerMartin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com>2010-02-26 22:37:30 +0100
commitabd1ecf209b30a0ed43f0aae50f8b8ce1be2c3d1 (patch)
treeea6b288eb128e9ad2efda58c11634c88c20f6aaf /arch
parentf64ca21714f114a78b6c19ceabc7745b29913efc (diff)
[S390] smp: rename and add lowcore defines
Rename __LC_RESTART_PSW to __LC_RST_NEW_PSW, add a define for the missing 32 bit variant and the missing old PSWs. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/s390/include/asm/lowcore.h5
-rw-r--r--arch/s390/kernel/swsusp_asm64.S2
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 8ed3c745cd0..a9eb6834d92 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -36,6 +36,8 @@
#define __LC_DUMP_REIPL 0x0e00
#ifndef __s390x__
+#define __LC_RST_NEW_PSW 0x0000
+#define __LC_RST_OLD_PSW 0x0008
#define __LC_EXT_OLD_PSW 0x0018
#define __LC_SVC_OLD_PSW 0x0020
#define __LC_PGM_OLD_PSW 0x0028
@@ -81,12 +83,13 @@
#define __LC_CREGS_SAVE_AREA 0x01c0
#else /* __s390x__ */
#define __LC_LAST_BREAK 0x0110
+#define __LC_RST_OLD_PSW 0x0120
#define __LC_EXT_OLD_PSW 0x0130
#define __LC_SVC_OLD_PSW 0x0140
#define __LC_PGM_OLD_PSW 0x0150
#define __LC_MCK_OLD_PSW 0x0160
#define __LC_IO_OLD_PSW 0x0170
-#define __LC_RESTART_PSW 0x01a0
+#define __LC_RST_NEW_PSW 0x01a0
#define __LC_EXT_NEW_PSW 0x01b0
#define __LC_SVC_NEW_PSW 0x01c0
#define __LC_PGM_NEW_PSW 0x01d0
diff --git a/arch/s390/kernel/swsusp_asm64.S b/arch/s390/kernel/swsusp_asm64.S
index 0c26cc1898e..b354427e03b 100644
--- a/arch/s390/kernel/swsusp_asm64.S
+++ b/arch/s390/kernel/swsusp_asm64.S
@@ -176,7 +176,7 @@ pgm_check_entry:
cgr %r1,%r2
je restore_registers /* r1 = r2 -> nothing to do */
larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
- mvc __LC_RESTART_PSW(16,%r0),0(%r4)
+ mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
3:
sigp %r9,%r1,__SIGP_INITIAL_CPU_RESET
brc 8,4f /* accepted */