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authorKevin Corry <kevcorry@us.ibm.com>2007-12-11 13:49:17 +0100
committerArnd Bergmann <arnd@arndb.de>2007-12-19 01:00:01 +0100
commit29641ce165e5f643b48988cb779c6ba97b647503 (patch)
tree1212a500fed327bfaf81237e6a451838ddd57aee /arch
parent7ee17466b6ac3b63ce87492d080e15e7f144f7d2 (diff)
[POWERPC] perfmon2: make pm_interval register read/write
The pm_interval register in the Cell PMU is read/write, but was implemented in the kernel as write-only. Previously, the written value was saved in a "shadow" copy so calls to cbe_read_pm() could return the value. Perfmon2 needs to be able to read the current values of pm_interval, so change cbe_read_pm() to read the actual register instead of the "shadow" copy. There is currently no code in the kernel that tries to read the pm_interval register with cbe_read_pm() (expecting to receive the "shadow" value), so this should not break any existing code. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/cell/pmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c
index 1ed30367888..99d688e88cb 100644
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -213,7 +213,7 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg)
break;
case pm_interval:
- READ_SHADOW_REG(val, pm_interval);
+ READ_MMIO_UPPER32(val, pm_interval);
break;
case pm_start_stop: