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authorRalf Baechle <ralf@linux-mips.org>2005-08-16 18:11:07 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:08 +0100
commita50b3e2763dc23f8427b7f4a199235dfe9a073c0 (patch)
tree275b781287caf29840d801ee2953e54429e07482 /arch
parent8b200ce4a697fbbf446de3a0874232d7aaa3f6d3 (diff)
Do the timer interrupt only once on CPU 0 ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/sibyte/sb1250/time.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 6f87f52d482..511c89d65f3 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -107,17 +107,18 @@ void sb1250_timer_interrupt(struct pt_regs *regs)
____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
- /*
- * CPU 0 handles the global timer interrupt job
- */
if (cpu == 0) {
+ /*
+ * CPU 0 handles the global timer interrupt job
+ */
ll_timer_interrupt(irq, regs);
}
-
- /*
- * every CPU should do profiling and process accouting
- */
- ll_local_timer_interrupt(irq, regs);
+ else {
+ /*
+ * other CPUs should just do profiling and process accounting
+ */
+ ll_local_timer_interrupt(irq, regs);
+ }
}
/*