diff options
| author | Andre Przywara <andre.przywara@amd.com> | 2009-07-02 15:04:14 +0200 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2009-09-10 08:33:10 +0300 |
| commit | f7c6d140032ae7e80df36d350c6edc41f92b2f94 (patch) | |
| tree | 4d69b6bc63e25b2e6599575c7377af71f82ea58d /arch | |
| parent | f691fe1da7e2715137d21ae5a80bec64db4625db (diff) | |
KVM: fix MMIO_CONF_BASE MSR access
Some Windows versions check whether the BIOS has setup MMI/O for
config space accesses on AMD Fam10h CPUs, we say "no" by returning 0 on
reads and only allow disabling of MMI/O CfgSpace setup by igoring "0" writes.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kvm/x86.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0e74d98641a..95fa45c0f16 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -844,6 +844,13 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) return 1; } break; + case MSR_FAM10H_MMIO_CONF_BASE: + if (data != 0) { + pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: " + "0x%llx\n", data); + return 1; + } + break; case MSR_AMD64_NB_CFG: break; case MSR_IA32_DEBUGCTLMSR: @@ -1055,6 +1062,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) case MSR_K7_EVNTSEL0: case MSR_K8_INT_PENDING_MSG: case MSR_AMD64_NB_CFG: + case MSR_FAM10H_MMIO_CONF_BASE: data = 0; break; case MSR_MTRRcap: |