diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-01 17:11:06 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-01 17:24:04 +0100 |
| commit | 07f841b7c587a3cbf481509be09ba5eda05f8d31 (patch) | |
| tree | 44f7a45c56568f17841c1a37afc49193fecb1714 /arch | |
| parent | b7a69ac303cbfc8d6fa8e91d10e8049244ba6847 (diff) | |
[ARM] mm: enable sparsemem on clps7500 and RiscPC
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/sparsemem.h | 20 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/memory.h | 8 | ||||
| -rw-r--r-- | arch/arm/mach-rpc/include/mach/memory.h | 8 |
4 files changed, 35 insertions, 3 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4eb816c4df7..83106c98755 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -250,6 +250,7 @@ config ARCH_CLPS7500 select TIMER_ACORN select ISA select NO_IOPORT + select ARCH_SPARSEMEM_ENABLE help Support for the Cirrus Logic PS7500FE system-on-a-chip. @@ -470,6 +471,7 @@ config ARCH_RPC select HAVE_PATA_PLATFORM select ISA_DMA_API select NO_IOPORT + select ARCH_SPARSEMEM_ENABLE help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. diff --git a/arch/arm/include/asm/sparsemem.h b/arch/arm/include/asm/sparsemem.h index 277158191a0..00098615c6f 100644 --- a/arch/arm/include/asm/sparsemem.h +++ b/arch/arm/include/asm/sparsemem.h @@ -3,8 +3,22 @@ #include <asm/memory.h> -#define MAX_PHYSADDR_BITS 32 -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS +/* + * Two definitions are required for sparsemem: + * + * MAX_PHYSMEM_BITS: The number of physical address bits required + * to address the last byte of memory. + * + * SECTION_SIZE_BITS: The number of physical address bits to cover + * the maximum amount of memory in a section. + * + * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000, + * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26. + * + * Define these in your mach/memory.h. + */ +#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS) +#error Sparsemem is not supported on this platform +#endif #endif diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h index 3326aa99d3e..87b32db470c 100644 --- a/arch/arm/mach-clps7500/include/mach/memory.h +++ b/arch/arm/mach-clps7500/include/mach/memory.h @@ -32,4 +32,12 @@ #define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE 0xdf000000 +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + #endif diff --git a/arch/arm/mach-rpc/include/mach/memory.h b/arch/arm/mach-rpc/include/mach/memory.h index 05425d558ee..9bf7e43e286 100644 --- a/arch/arm/mach-rpc/include/mach/memory.h +++ b/arch/arm/mach-rpc/include/mach/memory.h @@ -36,4 +36,12 @@ #define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE 0xdf000000 +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + #endif |