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authorBob Moore <robert.moore@intel.com>2009-05-21 11:05:03 +0800
committerLen Brown <len.brown@intel.com>2009-05-27 00:41:34 -0400
commitb1cd843be74ba0dcc6c42db7b11b76d63be149f6 (patch)
tree6a3df5446a8fe67d4b757fc0553c6e5e3097c0c2 /drivers/acpi/acpica
parent3362a6badb4fe75e198885b125b21ccf846861b4 (diff)
ACPICA: Disable preservation of SCI enable bit (SCI_EN)
Preserving this bit breaks some machines. Not preserving this bit seems to work OK in all cases, even though this goes against the ACPI spec. http://bugzilla.kernel.org/show_bug.cgi?id=13289 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/acpica')
-rw-r--r--drivers/acpi/acpica/aclocal.h11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 882b4b55867..ee986edfa0d 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -789,11 +789,14 @@ struct acpi_bit_register_info {
/* For control registers, both ignored and reserved bits must be preserved */
/*
- * The ACPI spec says to ignore PM1_CTL.SCI_EN (bit 0)
- * but we need to be able to write ACPI_BITREG_SCI_ENABLE directly
- * as a BIOS workaround on some machines.
+ * For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
+ * ACPI specification to be a "preserved" bit - "OSPM always preserves this
+ * bit position", section 4.7.3.2.1. However, on some machines the OS must
+ * write a one to this bit after resume for the machine to work properly.
+ * To enable this, we no longer attempt to preserve this bit. No machines
+ * are known to fail if the bit is not preserved. (May 2009)
*/
-#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bits 9 */
+#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bit 9 */
#define ACPI_PM1_CONTROL_RESERVED_BITS 0xC1F8 /* Bits 14-15, 3-8 */
#define ACPI_PM1_CONTROL_PRESERVED_BITS \
(ACPI_PM1_CONTROL_IGNORED_BITS | ACPI_PM1_CONTROL_RESERVED_BITS)