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authorAlbert Lee <albertcc@tw.ibm.com>2007-07-03 22:28:36 +0200
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-07-03 22:28:36 +0200
commit8006bf56e360a4db71d304df778870a371a9e930 (patch)
tree9471ba5fd85ce42c8ec6253893520371762e513e /drivers/cdrom/gscd.c
parent52374f890c1d0d64148d55a20d995a0b3e0ae987 (diff)
ide: pdc202xx_new PLL input clock fix
Recently the PLL input clock of Promise 2027x is sometimes detected higher than expected (e.g. 20.027 MHz compared to 16.714 MHz). It seems sometimes the mdelay() function is not as precise as it used to be. Per Alan's advice, HT or power management might affect the precision of mdelay(). This patch calls gettimeofday() to measure the time elapsed and calculate the PLL input clock accordingly. Signed-off-by: Albert Lee <albertcc@tw.ibm.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Bahadir Balban <bahadir.balban@gmail.com> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/cdrom/gscd.c')
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