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authorAlex Deucher <alexdeucher@gmail.com>2009-10-27 11:16:09 -0400
committerDave Airlie <airlied@redhat.com>2009-10-28 13:34:18 +1000
commit8f552a66a40bcc6e903e91310f42fe140e0342c4 (patch)
tree333324852853075bbcdd0962f7567e82a42ec1dc /drivers/char/sysrq.c
parent3e5cb98dfe87cc61d0a1119dd8aa2b1e4cfab424 (diff)
drm/radeon/kms/atom: loosen pll min output limits
Limiting the pll output range is a good thing generally as it limits the number of possible pll combinations for a given frequency presumably to the ones that work best on each card. That's why the limits are in the bios tables. However, certain duallink DVI monitors seem to like pll combinations that would be limited by this at least on pre-DCE 3.0 r6xx hardware. This might need to be adjusted per family or per clock range in the future. See fdo bug 24727. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/char/sysrq.c')
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