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authorMichael Chan <mchan@broadcom.com>2007-03-30 14:53:06 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-04-02 13:30:55 -0700
commitc873879c4db31bab414655e191cf56019b48c751 (patch)
tree66823c4e4b9cd88fc4c4d7df91746a043894840f /drivers/firmware/dcdbas.c
parentb59e139bbd5c789700aa9cefe7eb6590bc516b86 (diff)
[BNX2]: Fix nvram write logic.
The nvram dword alignment logic was broken when writing less than 4 bytes on a non-aligned offset. It was missing logic to round the length to 4 bytes. The page erase code is also moved so that it is only called when using non-buffered flash for better code clarity. Update version to 1.5.7. Based on initial patch from Tony Cureington <tony.cureington@hp.com>. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/firmware/dcdbas.c')
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