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authorJesse Barnes <jbarnes@virtuousgeek.org>2008-11-12 10:03:55 -0800
committerDave Airlie <airlied@linux.ie>2008-12-29 17:47:23 +1000
commitde151cf67ce52ed2d88083daa5e60c7858947329 (patch)
tree860c46d95061b261a7cab24a6ab57b68a0146f3a /drivers/gpu/drm/i915/i915_gem_tiling.c
parenta2c0a97b784f837300f7b0869c82ab712c600952 (diff)
drm/i915: add GEM GTT mapping support
Use the new core GEM object mapping code to allow GTT mapping of GEM objects on i915. The fault handler will make sure a fence register is allocated too, if the object in question is tiled. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index a8cb69469c6..241f39b7f46 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -208,6 +208,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
}
}
obj_priv->tiling_mode = args->tiling_mode;
+ obj_priv->stride = args->stride;
mutex_unlock(&dev->struct_mutex);