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author | Dave Airlie <airlied@redhat.com> | 2009-04-03 10:27:21 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2009-04-03 10:27:21 +1000 |
commit | 5f3dbedf2770cf6aeb5547b3c56734dee4e5186b (patch) | |
tree | e4930f7f4fe27b06079d2df8072a2bdf6457c666 /drivers/gpu/drm/i915/i915_gem_tiling.c | |
parent | 7a1fb5d06d3936c0982e2cf8b53b046244a9aad6 (diff) | |
parent | 1055f9ddad093f54dfd708a0f976582034d4ce1a (diff) |
Merge branch 'drm-intel-next' of ../anholt-2.6 into drm-linus
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 4cce1aef438..6be3f927c86 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -216,6 +216,22 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) else tile_width = 512; + /* check maximum stride & object size */ + if (IS_I965G(dev)) { + /* i965 stores the end address of the gtt mapping in the fence + * reg, so dont bother to check the size */ + if (stride / 128 > I965_FENCE_MAX_PITCH_VAL) + return false; + } else if (IS_I9XX(dev)) { + if (stride / tile_width > I830_FENCE_MAX_PITCH_VAL || + size > (I830_FENCE_MAX_SIZE_VAL << 20)) + return false; + } else { + if (stride / 128 > I830_FENCE_MAX_PITCH_VAL || + size > (I830_FENCE_MAX_SIZE_VAL << 19)) + return false; + } + /* 965+ just needs multiples of tile width */ if (IS_I965G(dev)) { if (stride & (tile_width - 1)) |