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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-02-11 12:41:05 -0800
committerEric Anholt <eric@anholt.net>2010-02-26 13:23:22 -0800
commit469d129664c5b83f37ca74913700d416d584833b (patch)
tree9799b7209b78a512482f12be05eb1ebef4833ab0 /drivers/gpu
parent16edd55029fcedaa0d03f24ee607c3a882871a10 (diff)
drm/i915: enable/disable LVDS port at DPMS time
It would be good to disable the LVDS port when we shut down the panel to save power. We haven't done so until now because we had trouble getting the right LVDS parameters from the BIOS. I think we're past that now, so enabling and disabling the port should be safe, though it would probably be made cleaner with some additional changes to the display code, where we also bang on the LVDS reg to set the pairing correctly etc. Seems to save a bit of power (up to 300mW in my basic wattsup meter testing). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 222459ad178..14e516fdc2d 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -89,17 +89,22 @@ static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
static void intel_lvds_set_power(struct drm_device *dev, bool on)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- u32 pp_status, ctl_reg, status_reg;
+ u32 pp_status, ctl_reg, status_reg, lvds_reg;
if (HAS_PCH_SPLIT(dev)) {
ctl_reg = PCH_PP_CONTROL;
status_reg = PCH_PP_STATUS;
+ lvds_reg = PCH_LVDS;
} else {
ctl_reg = PP_CONTROL;
status_reg = PP_STATUS;
+ lvds_reg = LVDS;
}
if (on) {
+ I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
+ POSTING_READ(lvds_reg);
+
I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
POWER_TARGET_ON);
do {
@@ -115,6 +120,9 @@ static void intel_lvds_set_power(struct drm_device *dev, bool on)
do {
pp_status = I915_READ(status_reg);
} while (pp_status & PP_ON);
+
+ I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
+ POSTING_READ(lvds_reg);
}
}