diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-05-11 14:44:27 +0200 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-05-11 14:44:31 +0200 |
commit | 41fb454ebe6024f5c1e3b3cbc0abc0da762e7b51 (patch) | |
tree | 51c50bcb67a5039448ddfa1869d7948cab1217e9 /drivers/ide/hpt366.c | |
parent | 19c1a6f5764d787113fa323ffb18be7991208f82 (diff) | |
parent | 091bf7624d1c90cec9e578a18529f615213ff847 (diff) |
Merge commit 'v2.6.30-rc5' into core/iommu
Merge reason: core/iommu was on an .30-rc1 base,
update it to .30-rc5 to refresh.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/ide/hpt366.c')
-rw-r--r-- | drivers/ide/hpt366.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c index a0eb87f5913..0feb66c720e 100644 --- a/drivers/ide/hpt366.c +++ b/drivers/ide/hpt366.c @@ -3,7 +3,7 @@ * Portions Copyright (C) 2001 Sun Microsystems, Inc. * Portions Copyright (C) 2003 Red Hat Inc * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz - * Portions Copyright (C) 2005-2008 MontaVista Software, Inc. + * Portions Copyright (C) 2005-2009 MontaVista Software, Inc. * * Thanks to HighPoint Technologies for their assistance, and hardware. * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his @@ -114,6 +114,8 @@ * the register setting lists into the table indexed by the clock selected * - set the correct hwif->ultra_mask for each individual chip * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards + * - stop resetting HPT370's state machine before each DMA transfer as that has + * caused more harm than good * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> */ @@ -133,7 +135,7 @@ #define DRV_NAME "hpt366" /* various tuning parameters */ -#define HPT_RESET_STATE_ENGINE +#undef HPT_RESET_STATE_ENGINE #undef HPT_DELAY_INTERRUPT static const char *quirk_drives[] = { @@ -808,7 +810,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive) /* get DMA command mode */ dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); /* stop DMA */ - outb(dma_cmd & ~0x1, hwif->dma_base + ATA_DMA_CMD); + outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD); hpt370_clear_engine(drive); } @@ -825,11 +827,11 @@ static int hpt370_dma_end(ide_drive_t *drive) ide_hwif_t *hwif = drive->hwif; u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); - if (dma_stat & 0x01) { + if (dma_stat & ATA_DMA_ACTIVE) { /* wait a little */ udelay(20); dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); - if (dma_stat & 0x01) + if (dma_stat & ATA_DMA_ACTIVE) hpt370_irq_timeout(drive); } return ide_dma_end(drive); @@ -851,7 +853,7 @@ static int hpt374_dma_test_irq(ide_drive_t *drive) dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); /* return 1 if INTR asserted */ - if (dma_stat & 4) + if (dma_stat & ATA_DMA_INTR) return 1; return 0; |