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authorRalph Campbell <ralph.campbell@qlogic.com>2007-07-24 13:55:39 -0700
committerRoland Dreier <rolandd@cisco.com>2007-10-09 20:04:14 -0700
commit210d6ca3db058cd1d6e6fd235ee3e25d6ac221cd (patch)
tree3fb104498d7b4144a1da0ca9d4a2241560a96ef4 /drivers/infiniband/hw/ipath/ipath_kernel.h
parent327a338d4fd018d33e7cacde46c0d82622b4bda8 (diff)
IB/ipath: Performance optimization for CPU differences
Different processors have different ordering restrictions for write combining. By taking advantage of this, we can eliminate some write barriers when writing to the send buffers. Signed-off-by: Ralph Campbell <ralph.campbell@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_kernel.h')
-rw-r--r--drivers/infiniband/hw/ipath/ipath_kernel.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_kernel.h b/drivers/infiniband/hw/ipath/ipath_kernel.h
index 7a7966f7e4f..d983f92b9bc 100644
--- a/drivers/infiniband/hw/ipath/ipath_kernel.h
+++ b/drivers/infiniband/hw/ipath/ipath_kernel.h
@@ -724,6 +724,8 @@ int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
#define IPATH_LINKACTIVE 0x200
/* link current state is unknown */
#define IPATH_LINKUNK 0x400
+ /* Write combining flush needed for PIO */
+#define IPATH_PIO_FLUSH_WC 0x1000
/* no IB cable, or no device on IB cable */
#define IPATH_NOCABLE 0x4000
/* Supports port zero per packet receive interrupts via