diff options
| author | Akihiro Tsukada <tskd2@yahoo.co.jp> | 2009-11-19 12:19:50 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2009-12-16 00:18:12 -0200 |
| commit | 0e2f0d348a65b48a8af52d7fd64d77b5759413fa (patch) | |
| tree | 2cdbee759b4ecee701e26086598dce71acc6de8d /drivers/media/dvb | |
| parent | 05395a3d86a928d374c970a0b35a6a711072f86c (diff) | |
V4L/DVB (13577): [PATCH] dvb-usb-friio: accept center-shifted frequency
This patch adds a fix to accept frequency with its center shifted.
The driver used to accept center frequencies of the normal UHF band channels,
but in ISDB-T, center frequency is shifted with 1/7MHz.
It was shifted internally in the driver,
but this patch enables to accept both types of frequency.
Signed-off-by: Akihiro Tsukada <tskd2@yahoo.co.jp>
Signed-off-by: Patrick Boettcher <pboettcher@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb')
| -rw-r--r-- | drivers/media/dvb/dvb-usb/friio-fe.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/media/dvb/dvb-usb/friio-fe.c b/drivers/media/dvb/dvb-usb/friio-fe.c index 9cbbe42ca44..ebb7b9fd115 100644 --- a/drivers/media/dvb/dvb-usb/friio-fe.c +++ b/drivers/media/dvb/dvb-usb/friio-fe.c @@ -134,11 +134,13 @@ static int jdvbt90502_pll_set_freq(struct jdvbt90502_state *state, u32 freq) deb_fe("%s: freq=%d, step=%d\n", __func__, freq, state->frontend.ops.info.frequency_stepsize); /* freq -> oscilator frequency conversion. */ - /* freq: 473,000,000 + n*6,000,000 (no 1/7MHz shift to center freq) */ - /* add 400[1/7 MHZ] = 57.142857MHz. 57MHz for the IF, */ - /* 1/7MHz for center freq shift */ + /* freq: 473,000,000 + n*6,000,000 [+ 142857 (center freq. shift)] */ f = freq / state->frontend.ops.info.frequency_stepsize; - f += 400; + /* add 399[1/7 MHZ] = 57MHz for the IF */ + f += 399; + /* add center frequency shift if necessary */ + if (f % 7 == 0) + f++; pll_freq_cmd[DEMOD_REDIRECT_REG] = JDVBT90502_2ND_I2C_REG; /* 0xFE */ pll_freq_cmd[ADDRESS_BYTE] = state->config.pll_address << 1; pll_freq_cmd[DIVIDER_BYTE1] = (f >> 8) & 0x7F; |