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authorLars-Peter Clausen <lars@metafoo.de>2009-10-17 01:51:11 +0200
committerPaul Fertser <fercerpav@gmail.com>2009-10-17 04:23:23 +0400
commitee73a861f3273b9603577468a06b433d5f5be129 (patch)
treef0647be1ca67e7842e787223712d169f03f5eed9 /drivers/mfd
parent74fca6a42863ffacaf7ba6f1936a9f228950f657 (diff)
Inital pcf50606 support
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/Kconfig23
-rw-r--r--drivers/mfd/Makefile5
-rw-r--r--drivers/mfd/pcf50606-adc.c279
-rw-r--r--drivers/mfd/pcf50606-core.c680
-rw-r--r--drivers/mfd/pcf50606-gpo.c119
5 files changed, 1106 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 491ac0f800d..4e952cc7a8f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -263,6 +263,29 @@ config EZX_PCAP
This enables the PCAP ASIC present on EZX Phones. This is
needed for MMC, TouchScreen, Sound, USB, etc..
+config MFD_PCF50606
+ tristate "Support for NXP PCF50606"
+ depends on I2C
+ help
+ Say yes here if you have NXP PCF50606 chip on your board.
+ This core driver provides register access and IRQ handling
+ facilities, and registers devices for the various functions
+ so that function-specific drivers can bind to them.
+
+config PCF50606_ADC
+ tristate "Support for NXP PCF50606 ADC"
+ depends on MFD_PCF50606
+ help
+ Say yes here if you want to include support for ADC in the
+ NXP PCF50606 chip.
+
+config PCF50606_GPO
+ tristate "Support for NXP PCF50606 GPO"
+ depends on MFD_PCF50606
+ help
+ Say yes here if you want to include support GPO for pins on
+ the PCF50606 chip.
+
endmenu
menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 6f8a9a1af20..ba41b36f2c5 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -44,3 +44,8 @@ obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o
obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
+
+obj-$(CONFIG_MFD_PCF50606) += pcf50606-core.o
+obj-$(CONFIG_PCF50606_ADC) += pcf50606-adc.o
+obj-$(CONFIG_PCF50606_GPO) += pcf50606-gpo.o
+
diff --git a/drivers/mfd/pcf50606-adc.c b/drivers/mfd/pcf50606-adc.c
new file mode 100644
index 00000000000..38f5b5c0593
--- /dev/null
+++ b/drivers/mfd/pcf50606-adc.c
@@ -0,0 +1,279 @@
+/* Philips PCF50606 ADC Driver
+ *
+ * (C) 2006-2008 by Openmoko, Inc.
+ * Author: Balaji Rao <balajirrao@openmoko.org>
+ * All rights reserved.
+ *
+ * Broken down from monstrous PCF50606 driver mainly by
+ * Harald Welte, Andy Green, Werner Almesberger and Matt Hsu
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * NOTE: This driver does not yet support subtractive ADC mode, which means
+ * you can do only one measurement per read request.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/completion.h>
+
+#include <linux/mfd/pcf50606/core.h>
+#include <linux/mfd/pcf50606/adc.h>
+
+struct pcf50606_adc_request {
+ int mux;
+ int result;
+ void (*callback)(struct pcf50606 *, void *, int);
+ void *callback_param;
+
+ /* Used in case of sync requests */
+ struct completion completion;
+
+};
+
+#define PCF50606_MAX_ADC_FIFO_DEPTH 8
+
+struct pcf50606_adc {
+ struct pcf50606 *pcf;
+
+ /* Private stuff */
+ struct pcf50606_adc_request *queue[PCF50606_MAX_ADC_FIFO_DEPTH];
+ int queue_head;
+ int queue_tail;
+ struct mutex queue_mutex;
+};
+
+static inline struct pcf50606_adc *__to_adc(struct pcf50606 *pcf)
+{
+ return platform_get_drvdata(pcf->adc_pdev);
+}
+
+static void adc_setup(struct pcf50606 *pcf, int channel)
+{
+ channel &= PCF50606_ADCC2_ADCMUX_MASK;
+
+ /* start ADC conversion of selected channel */
+ pcf50606_reg_write(pcf, PCF50606_REG_ADCC2, channel |
+ PCF50606_ADCC2_ADCSTART | PCF50606_ADCC2_RES_10BIT);
+
+}
+
+static void trigger_next_adc_job_if_any(struct pcf50606 *pcf)
+{
+ struct pcf50606_adc *adc = __to_adc(pcf);
+ int head, tail;
+
+ mutex_lock(&adc->queue_mutex);
+
+ head = adc->queue_head;
+ tail = adc->queue_tail;
+
+ if (!adc->queue[head])
+ goto out;
+
+ adc_setup(pcf, adc->queue[head]->mux);
+out:
+ mutex_unlock(&adc->queue_mutex);
+}
+
+static int
+adc_enqueue_request(struct pcf50606 *pcf, struct pcf50606_adc_request *req)
+{
+ struct pcf50606_adc *adc = __to_adc(pcf);
+ int head, tail;
+
+ mutex_lock(&adc->queue_mutex);
+ head = adc->queue_head;
+ tail = adc->queue_tail;
+
+ if (adc->queue[tail]) {
+ mutex_unlock(&adc->queue_mutex);
+ return -EBUSY;
+ }
+
+ adc->queue[tail] = req;
+
+ adc->queue_tail =
+ (tail + 1) & (PCF50606_MAX_ADC_FIFO_DEPTH - 1);
+
+ mutex_unlock(&adc->queue_mutex);
+
+ trigger_next_adc_job_if_any(pcf);
+
+ return 0;
+}
+
+static void
+pcf50606_adc_sync_read_callback(struct pcf50606 *pcf, void *param, int result)
+{
+ struct pcf50606_adc_request *req;
+
+ /*We know here that the passed param is an adc_request object */
+ req = (struct pcf50606_adc_request *)param;
+
+ req->result = result;
+ complete(&req->completion);
+}
+
+int pcf50606_adc_sync_read(struct pcf50606 *pcf, int mux)
+{
+
+ struct pcf50606_adc_request *req;
+ int result;
+
+ /* req is freed when the result is ready, in irq handler*/
+ req = kzalloc(sizeof(*req), GFP_KERNEL);
+ if (!req)
+ return -ENOMEM;
+
+ req->mux = mux;
+ req->callback = pcf50606_adc_sync_read_callback;
+ req->callback_param = req;
+ init_completion(&req->completion);
+
+ adc_enqueue_request(pcf, req);
+
+ if (wait_for_completion_timeout(&req->completion, 5 * HZ) == 5 * HZ) {
+ dev_err(pcf->dev, "ADC read timed out \n");
+ }
+
+ result = req->result;
+
+ return result;
+}
+EXPORT_SYMBOL_GPL(pcf50606_adc_sync_read);
+
+int pcf50606_adc_async_read(struct pcf50606 *pcf, int mux,
+ void (*callback)(struct pcf50606 *, void *, int),
+ void *callback_param)
+{
+ struct pcf50606_adc_request *req;
+
+ /* req is freed when the result is ready, in pcf50606_work*/
+ req = kmalloc(sizeof(*req), GFP_KERNEL);
+ if (!req)
+ return -ENOMEM;
+
+ req->mux = mux;
+ req->callback = callback;
+ req->callback_param = callback_param;
+
+ adc_enqueue_request(pcf, req);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pcf50606_adc_async_read);
+
+static int adc_result(struct pcf50606 *pcf)
+{
+ u16 ret = (pcf50606_reg_read(pcf, PCF50606_REG_ADCS1) << 2) |
+ (pcf50606_reg_read(pcf, PCF50606_REG_ADCS2) & 0x03);
+
+ dev_dbg(pcf->dev, "adc result = %d\n", ret);
+
+ return ret;
+}
+
+static void pcf50606_adc_irq(int irq, void *data)
+{
+ struct pcf50606_adc *adc = data;
+ struct pcf50606 *pcf = adc->pcf;
+ struct pcf50606_adc_request *req;
+ int head;
+
+ mutex_lock(&adc->queue_mutex);
+ head = adc->queue_head;
+
+ req = adc->queue[head];
+ if (WARN_ON(!req)) {
+ dev_err(pcf->dev, "pcf50606-adc irq: ADC queue empty!\n");
+ mutex_unlock(&adc->queue_mutex);
+ return;
+ }
+
+ adc->queue[head] = NULL;
+ adc->queue_head = (head + 1) &
+ (PCF50606_MAX_ADC_FIFO_DEPTH - 1);
+
+ mutex_unlock(&adc->queue_mutex);
+
+ req->callback(pcf, req->callback_param, adc_result(pcf));
+ kfree(req);
+
+ trigger_next_adc_job_if_any(pcf);
+}
+
+static int __devinit pcf50606_adc_probe(struct platform_device *pdev)
+{
+ struct pcf50606_subdev_pdata *pdata = pdev->dev.platform_data;
+ struct pcf50606_adc *adc;
+
+ adc = kzalloc(sizeof(*adc), GFP_KERNEL);
+ if (!adc)
+ return -ENOMEM;
+
+ adc->pcf = pdata->pcf;
+ platform_set_drvdata(pdev, adc);
+
+ pcf50606_register_irq(pdata->pcf, PCF50606_IRQ_ADCRDY,
+ pcf50606_adc_irq, adc);
+
+ mutex_init(&adc->queue_mutex);
+
+ return 0;
+}
+
+static int __devexit pcf50606_adc_remove(struct platform_device *pdev)
+{
+ struct pcf50606_adc *adc = platform_get_drvdata(pdev);
+ int i, head;
+
+ pcf50606_free_irq(adc->pcf, PCF50606_IRQ_ADCRDY);
+
+ mutex_lock(&adc->queue_mutex);
+ head = adc->queue_head;
+
+ if (WARN_ON(adc->queue[head]))
+ dev_err(adc->pcf->dev,
+ "adc driver removed with request pending\n");
+
+ for (i = 0; i < PCF50606_MAX_ADC_FIFO_DEPTH; i++)
+ kfree(adc->queue[i]);
+
+ mutex_unlock(&adc->queue_mutex);
+ kfree(adc);
+
+ return 0;
+}
+
+struct platform_driver pcf50606_adc_driver = {
+ .driver = {
+ .name = "pcf50606-adc",
+ },
+ .probe = pcf50606_adc_probe,
+ .remove = __devexit_p(pcf50606_adc_remove),
+};
+
+static int __init pcf50606_adc_init(void)
+{
+ return platform_driver_register(&pcf50606_adc_driver);
+}
+module_init(pcf50606_adc_init);
+
+static void __exit pcf50606_adc_exit(void)
+{
+ platform_driver_unregister(&pcf50606_adc_driver);
+}
+module_exit(pcf50606_adc_exit);
+
+MODULE_AUTHOR("Balaji Rao <balajirrao@openmoko.org>");
+MODULE_DESCRIPTION("PCF50606 adc driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:pcf50606-adc");
+
diff --git a/drivers/mfd/pcf50606-core.c b/drivers/mfd/pcf50606-core.c
new file mode 100644
index 00000000000..09ce70b9b79
--- /dev/null
+++ b/drivers/mfd/pcf50606-core.c
@@ -0,0 +1,680 @@
+/* Philips PCF50606 Power Management Unit (PMU) driver
+ *
+ * (C) 2006-2008 by Openmoko, Inc.
+ * Author: Harald Welte <laforge@openmoko.org>
+ * Matt Hsu <matt@openmoko.org>
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/sysfs.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/irq.h>
+#include <linux/device.h>
+#include <linux/module.h>
+
+#include <linux/mfd/pcf50606/core.h>
+
+static int __pcf50606_read(struct pcf50606 *pcf, u8 reg, int num, u8 *data)
+{
+ int ret;
+
+ ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg,
+ num, data);
+ if (ret < 0)
+ dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg);
+
+ return ret;
+}
+
+static int __pcf50606_write(struct pcf50606 *pcf, u8 reg, int num, u8 *data)
+{
+ int ret;
+
+ ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg,
+ num, data);
+ if (ret < 0)
+ dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg);
+
+ return ret;
+
+}
+
+/* Read a block of upto 32 regs */
+int pcf50606_read_block(struct pcf50606 *pcf, u8 reg,
+ int nr_regs, u8 *data)
+{
+ int ret;
+
+ mutex_lock(&pcf->lock);
+ ret = __pcf50606_read(pcf, reg, nr_regs, data);
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcf50606_read_block);
+
+/* Write a block of upto 32 regs */
+int pcf50606_write_block(struct pcf50606 *pcf , u8 reg,
+ int nr_regs, u8 *data)
+{
+ int ret;
+
+ mutex_lock(&pcf->lock);
+ ret = __pcf50606_write(pcf, reg, nr_regs, data);
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcf50606_write_block);
+
+u8 pcf50606_reg_read(struct pcf50606 *pcf, u8 reg)
+{
+ u8 val;
+
+ mutex_lock(&pcf->lock);
+ __pcf50606_read(pcf, reg, 1, &val);
+ mutex_unlock(&pcf->lock);
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(pcf50606_reg_read);
+
+int pcf50606_reg_write(struct pcf50606 *pcf, u8 reg, u8 val)
+{
+ int ret;
+
+ mutex_lock(&pcf->lock);
+ ret = __pcf50606_write(pcf, reg, 1, &val);
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcf50606_reg_write);
+
+int pcf50606_reg_set_bit_mask(struct pcf50606 *pcf, u8 reg, u8 mask, u8 val)
+{
+ int ret;
+ u8 tmp;
+
+ val &= mask;
+
+ mutex_lock(&pcf->lock);
+ ret = __pcf50606_read(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ tmp &= ~mask;
+ tmp |= val;
+ ret = __pcf50606_write(pcf, reg, 1, &tmp);
+
+out:
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcf50606_reg_set_bit_mask);
+
+int pcf50606_reg_clear_bits(struct pcf50606 *pcf, u8 reg, u8 val)
+{
+ int ret;
+ u8 tmp;
+
+ mutex_lock(&pcf->lock);
+ ret = __pcf50606_read(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ tmp &= ~val;
+ ret = __pcf50606_write(pcf, reg, 1, &tmp);
+
+out:
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pcf50606_reg_clear_bits);
+
+/* sysfs attributes */
+static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
+ char *buf)
+{
+ struct pcf50606 *pcf = dev_get_drvdata(dev);
+ u8 dump[16];
+ int n, n1, idx = 0;
+ char *buf1 = buf;
+ static u8 address_no_read[] = { /* must be ascending */
+ PCF50606_REG_INT1,
+ PCF50606_REG_INT2,
+ PCF50606_REG_INT3,
+ 0 /* terminator */
+ };
+
+ for (n = 0; n < 256; n += sizeof(dump)) {
+ for (n1 = 0; n1 < sizeof(dump); n1++)
+ if (n == address_no_read[idx]) {
+ idx++;
+ dump[n1] = 0x00;
+ } else
+ dump[n1] = pcf50606_reg_read(pcf, n + n1);
+
+ hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
+ buf1 += strlen(buf1);
+ *buf1++ = '\n';
+ *buf1 = '\0';
+ }
+
+ return buf1 - buf;
+}
+static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL);
+
+static ssize_t show_resume_reason(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct pcf50606 *pcf = dev_get_drvdata(dev);
+ int n;
+
+ n = sprintf(buf, "%02x%02x%02x\n",
+ pcf->resume_reason[0],
+ pcf->resume_reason[1],
+ pcf->resume_reason[2]);
+
+ return n;
+}
+static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL);
+
+static struct attribute *pcf_sysfs_entries[] = {
+ &dev_attr_dump_regs.attr,
+ &dev_attr_resume_reason.attr,
+ NULL,
+};
+
+static struct attribute_group pcf_attr_group = {
+ .name = NULL, /* put in device directory */
+ .attrs = pcf_sysfs_entries,
+};
+
+int pcf50606_register_irq(struct pcf50606 *pcf, int irq,
+ void (*handler) (int, void *), void *data)
+{
+ if (irq < 0 || irq > PCF50606_NUM_IRQ || !handler)
+ return -EINVAL;
+
+ if (WARN_ON(pcf->irq_handler[irq].handler))
+ return -EBUSY;
+
+ mutex_lock(&pcf->lock);
+ pcf->irq_handler[irq].handler = handler;
+ pcf->irq_handler[irq].data = data;
+ mutex_unlock(&pcf->lock);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pcf50606_register_irq);
+
+int pcf50606_free_irq(struct pcf50606 *pcf, int irq)
+{
+ if (irq < 0 || irq > PCF50606_NUM_IRQ)
+ return -EINVAL;
+
+ mutex_lock(&pcf->lock);
+ pcf->irq_handler[irq].handler = NULL;
+ mutex_unlock(&pcf->lock);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(pcf50606_free_irq);
+
+static int __pcf50606_irq_mask_set(struct pcf50606 *pcf, int irq, u8 mask)
+{
+ u8 reg, bits, tmp;
+ int ret = 0, idx;
+
+ idx = irq >> 3;
+ reg = PCF50606_REG_INT1M + idx;
+ bits = 1 << (irq & 0x07);
+
+ mutex_lock(&pcf->lock);
+
+ if (mask) {
+ ret = __pcf50606_read(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ tmp |= bits;
+
+ ret = __pcf50606_write(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ pcf->mask_regs[idx] &= ~bits;
+ pcf->mask_regs[idx] |= bits;
+ } else {
+ ret = __pcf50606_read(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ tmp &= ~bits;
+
+ ret = __pcf50606_write(pcf, reg, 1, &tmp);
+ if (ret < 0)
+ goto out;
+
+ pcf->mask_regs[idx] &= ~bits;
+ }
+out:
+ mutex_unlock(&pcf->lock);
+
+ return ret;
+}
+
+int pcf50606_irq_mask(struct pcf50606 *pcf, int irq)
+{
+ dev_dbg(pcf->dev, "Masking IRQ %d\n", irq);
+
+ return __pcf50606_irq_mask_set(pcf, irq, 1);
+}
+EXPORT_SYMBOL_GPL(pcf50606_irq_mask);
+
+int pcf50606_irq_unmask(struct pcf50606 *pcf, int irq)
+{
+ dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq);
+
+ return __pcf50606_irq_mask_set(pcf, irq, 0);
+}
+EXPORT_SYMBOL_GPL(pcf50606_irq_unmask);
+
+int pcf50606_irq_mask_get(struct pcf50606 *pcf, int irq)
+{
+ u8 reg, bits;
+
+ reg = (irq / 8);
+ bits = (1 << (irq % 8));
+
+ return pcf->mask_regs[reg] & bits;
+}
+EXPORT_SYMBOL_GPL(pcf50606_irq_mask_get);
+
+static void pcf50606_irq_call_handler(struct pcf50606 *pcf,
+ int irq)
+{
+ if (pcf->irq_handler[irq].handler)
+ pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
+}
+
+#define PCF50606_ONKEY1S_TIMEOUT 8
+
+#define PCF50606_REG_MBCS1 0x2c
+
+static void pcf50606_irq_worker(struct work_struct *work)
+{
+ struct pcf50606 *pcf;
+ int ret, i, j;
+ u8 pcf_int[3], chgstat;
+
+ pcf = container_of(work, struct pcf50606, irq_work);
+
+ /* Read the 3 INT regs in one transaction */
+ ret = pcf50606_read_block(pcf, PCF50606_REG_INT1,
+ ARRAY_SIZE(pcf_int), pcf_int);
+ if (ret != ARRAY_SIZE(pcf_int)) {
+ dev_err(pcf->dev, "Error reading INT registers\n");
+
+ /*
+ * If this doesn't ACK the interrupt to the chip, we'll be
+ * called once again as we're level triggered.
+ */
+ goto out;
+ }
+
+ /* We immediately read the charger status. We thus make sure
+ * only of CHGINS/CHGRM interrupt handlers are called */
+ if (pcf_int[1] & (PCF50606_INT2_CHGINS | PCF50606_INT2_CHGRM)) {
+ chgstat = pcf50606_reg_read(pcf, PCF50606_REG_MBCS1);
+ if (chgstat & (0x1 << 4))
+ pcf_int[1] &= ~(1 << PCF50606_INT2_CHGRM);
+ else
+ pcf_int[1] &= ~(1 << PCF50606_INT2_CHGINS);
+ }
+
+ dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x\n",
+ pcf_int[0], pcf_int[1], pcf_int[2]);
+
+ /* Some revisions of the chip don't have a 8s standby mode on
+ * ONKEY1S press. We try to manually do it in such cases. */
+ if (pcf_int[0] & PCF50606_INT1_SECOND && pcf->onkey1s_held) {
+ dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
+ pcf->onkey1s_held);
+ if (pcf->onkey1s_held++ == PCF50606_ONKEY1S_TIMEOUT)
+ if (pcf->pdata->force_shutdown)
+ pcf->pdata->force_shutdown(pcf);
+ }
+
+ if (pcf_int[0] & PCF50606_INT1_ONKEY1S) {
+ dev_info(pcf->dev, "ONKEY1S held\n");
+ pcf->onkey1s_held = 1 ;
+
+ /* Unmask IRQ_SECOND */
+ pcf50606_reg_clear_bits(pcf, PCF50606_REG_INT1M,
+ PCF50606_INT1_SECOND);
+
+ /* Unmask IRQ_ONKEYF */
+ pcf50606_reg_clear_bits(pcf, PCF50606_REG_INT1M,
+ PCF50606_INT1_ONKEYF);
+ }
+
+ if ((pcf_int[0] & PCF50606_INT1_ONKEYR) && pcf->onkey1s_held) {
+ pcf->onkey1s_held = 0;
+
+ /* Mask SECOND and ONKEYF interrupts */
+ if (pcf->mask_regs[0] & PCF50606_INT1_SECOND)
+ pcf50606_reg_set_bit_mask(pcf,
+ PCF50606_REG_INT1M,
+ PCF50606_INT1_SECOND,
+ PCF50606_INT1_SECOND);
+
+ if (pcf->mask_regs[0] & PCF50606_INT1_ONKEYF)
+ pcf50606_reg_set_bit_mask(pcf,
+ PCF50606_REG_INT1M,
+ PCF50606_INT1_ONKEYF,
+ PCF50606_INT1_ONKEYF);
+ }
+
+ /* Have we just resumed ? */
+ if (pcf->is_suspended) {
+
+ pcf->is_suspended = 0;
+
+ /* Set the resume reason filtering out non resumers */
+ for (i = 0; i < ARRAY_SIZE(pcf_int); i++)
+ pcf->resume_reason[i] = pcf_int[i] &
+ pcf->pdata->resumers[i];
+
+ /* Make sure we don't pass on ONKEY events to
+ * userspace now */
+ pcf_int[1] &= ~(PCF50606_INT1_ONKEYR | PCF50606_INT1_ONKEYF);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(pcf_int); i++) {
+ /* Unset masked interrupts */
+ pcf_int[i] &= ~pcf->mask_regs[i];
+
+ for (j = 0; j < 8 ; j++)
+ if (pcf_int[i] & (1 << j))
+ pcf50606_irq_call_handler(pcf, (i * 8) + j);
+ }
+
+out:
+ put_device(pcf->dev);
+ enable_irq(pcf->irq);
+}
+
+static irqreturn_t pcf50606_irq(int irq, void *data)
+{
+ struct pcf50606 *pcf = data;
+
+ get_device(pcf->dev);
+ disable_irq(pcf->irq);
+ schedule_work(&pcf->irq_work);
+
+ return IRQ_HANDLED;
+}
+
+static void
+pcf50606_client_dev_register(struct pcf50606 *pcf, const char *name,
+ struct platform_device **pdev)
+{
+ struct pcf50606_subdev_pdata subdev_pdata;
+ int ret;
+
+ *pdev = platform_device_alloc(name, -1);
+ if (!*pdev) {
+ dev_err(pcf->dev, "Falied to allocate %s\n", name);
+ return;
+ }
+
+ subdev_pdata.pcf = pcf;
+ platform_device_add_data(*pdev, &subdev_pdata, sizeof(subdev_pdata));
+
+ (*pdev)->dev.parent = pcf->dev;
+
+ ret = platform_device_add(*pdev);
+ if (ret) {
+ dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret);
+ platform_device_put(*pdev);
+ *pdev = NULL;
+ }
+}
+
+#ifdef CONFIG_PM
+static int pcf50606_suspend(struct device *dev, pm_message_t state)
+{
+ struct pcf50606 *pcf;
+ int ret, i;
+ u8 res[3];
+
+ pcf = dev_get_drvdata(dev);
+
+ /* Make sure our interrupt handlers are not called
+ * henceforth */
+ disable_irq(pcf->irq);
+
+ /* Make sure that any running IRQ worker has quit */
+ cancel_work_sync(&pcf->irq_work);
+
+ /* Save the masks */
+ ret = pcf50606_read_block(pcf, PCF50606_REG_INT1M,
+ ARRAY_SIZE(pcf->suspend_irq_masks),
+ pcf->suspend_irq_masks);
+ if (ret < 0) {
+ dev_err(pcf->dev, "error saving irq masks\n");
+ goto out;
+ }
+
+ /* Write wakeup irq masks */
+ for (i = 0; i < ARRAY_SIZE(res); i++)
+ res[i] = ~pcf->pdata->resumers[i];
+
+ ret = pcf50606_write_block(pcf, PCF50606_REG_INT1M,
+ ARRAY_SIZE(res), &res[0]);
+ if (ret < 0) {
+ dev_err(pcf->dev, "error writing wakeup irq masks\n");
+ goto out;
+ }
+
+ pcf->is_suspended = 1;
+
+out:
+ return ret;
+}
+
+static int pcf50606_resume(struct device *dev)
+{
+ struct pcf50606 *pcf;
+ int ret;
+
+ pcf = dev_get_drvdata(dev);
+
+ /* Write the saved mask registers */
+ ret = pcf50606_write_block(pcf, PCF50606_REG_INT1M,
+ ARRAY_SIZE(pcf->suspend_irq_masks),
+ pcf->suspend_irq_masks);
+ if (ret < 0)
+ dev_err(pcf->dev, "Error restoring saved suspend masks\n");
+
+ get_device(pcf->dev);
+
+ /*
+ * Clear any pending interrupts and set resume reason if any.
+ * This will leave with enable_irq()
+ */
+ pcf50606_irq_worker(&pcf->irq_work);
+
+ return 0;
+}
+#else
+#define pcf50606_suspend NULL
+#define pcf50606_resume NULL
+#endif
+
+static int pcf50606_probe(struct i2c_client *client,
+ const struct i2c_device_id *ids)
+{
+ struct pcf50606 *pcf;
+ struct pcf50606_platform_data *pdata = client->dev.platform_data;
+ int i, ret = 0;
+ int version, variant;
+
+ pcf = kzalloc(sizeof(*pcf), GFP_KERNEL);
+ if (!pcf)
+ return -ENOMEM;
+
+ pcf->pdata = pdata;
+
+ mutex_init(&pcf->lock);
+
+ i2c_set_clientdata(client, pcf);
+ pcf->dev = &client->dev;
+ pcf->i2c_client = client;
+ pcf->irq = client->irq;
+
+ INIT_WORK(&pcf->irq_work, pcf50606_irq_worker);
+
+ version = pcf50606_reg_read(pcf, 0);
+ variant = pcf50606_reg_read(pcf, 1);
+ if (version < 0 || variant < 0) {
+ dev_err(pcf->dev, "Unable to probe pcf50606\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ dev_info(pcf->dev, "Probed device version %d variant %d\n",
+ version, variant);
+ /* Enable all inteerupts except RTC SECOND */
+ pcf->mask_regs[0] = 0x40;
+ pcf50606_reg_write(pcf, PCF50606_REG_INT1M, pcf->mask_regs[0]);
+ pcf50606_reg_write(pcf, PCF50606_REG_INT2M, 0x00);
+ pcf50606_reg_write(pcf, PCF50606_REG_INT3M, 0x00);
+
+ pcf50606_client_dev_register(pcf, "pcf50606-input",
+ &pcf->input_pdev);
+ pcf50606_client_dev_register(pcf, "pcf50606-rtc",
+ &pcf->rtc_pdev);
+ pcf50606_client_dev_register(pcf, "pcf50606-mbc",
+ &pcf->mbc_pdev);
+ pcf50606_client_dev_register(pcf, "pcf50606-adc",
+ &pcf->adc_pdev);
+ pcf50606_client_dev_register(pcf, "pcf50606-wdt",
+ &pcf->wdt_pdev);
+ for (i = 0; i < PCF50606_NUM_REGULATORS; i++) {
+ struct platform_device *pdev;
+
+ pdev = platform_device_alloc("pcf50606-regltr", i);
+ if (!pdev) {
+ dev_err(pcf->dev, "Cannot create regulator\n");
+ continue;
+ }
+
+ pdev->dev.parent = pcf->dev;
+ pdev->dev.platform_data = &pdata->reg_init_data[i];
+ pdev->dev.driver_data = pcf;
+ pcf->regulator_pdev[i] = pdev;
+
+ platform_device_add(pdev);
+ }
+
+ if (client->irq) {
+ set_irq_handler(client->irq, handle_level_irq);
+ ret = request_irq(client->irq, pcf50606_irq,
+ IRQF_TRIGGER_LOW, "pcf50606", pcf);
+
+ if (ret) {
+ dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
+ goto err;
+ }
+ } else {
+ dev_err(pcf->dev, "No IRQ configured\n");
+ goto err;
+ }
+
+ if (enable_irq_wake(client->irq) < 0)
+ dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
+ "in this hardware revision", client->irq);
+
+ ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group);
+ if (ret)
+ dev_err(pcf->dev, "error creating sysfs entries\n");
+
+ if (pdata->probe_done)
+ pdata->probe_done(pcf);
+
+ return 0;
+
+err:
+ kfree(pcf);
+ return ret;
+}
+
+static int pcf50606_remove(struct i2c_client *client)
+{
+ struct pcf50606 *pcf = i2c_get_clientdata(client);
+ int i;
+
+ free_irq(pcf->irq, pcf);
+
+ platform_device_unregister(pcf->input_pdev);
+ platform_device_unregister(pcf->rtc_pdev);
+ platform_device_unregister(pcf->mbc_pdev);
+ platform_device_unregister(pcf->adc_pdev);
+
+ for (i = 0; i < PCF50606_NUM_REGULATORS; i++)
+ platform_device_unregister(pcf->regulator_pdev[i]);
+
+ kfree(pcf);
+
+ return 0;
+}
+
+static struct i2c_device_id pcf50606_id_table[] = {
+ {"pcf50606", 0x08},
+};
+
+static struct i2c_driver pcf50606_driver = {
+ .driver = {
+ .name = "pcf50606",
+ .suspend = pcf50606_suspend,
+ .resume = pcf50606_resume,
+ },
+ .id_table = pcf50606_id_table,
+ .probe = pcf50606_probe,
+ .remove = pcf50606_remove,
+};
+
+static int __init pcf50606_init(void)
+{
+ return i2c_add_driver(&pcf50606_driver);
+}
+
+static void pcf50606_exit(void)
+{
+ i2c_del_driver(&pcf50606_driver);
+}
+
+MODULE_DESCRIPTION("I2C chip driver for NXP PCF50606 PMU");
+MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
+MODULE_LICENSE("GPL");
+
+module_init(pcf50606_init);
+module_exit(pcf50606_exit);
diff --git a/drivers/mfd/pcf50606-gpo.c b/drivers/mfd/pcf50606-gpo.c
new file mode 100644
index 00000000000..3510f8b48e9
--- /dev/null
+++ b/drivers/mfd/pcf50606-gpo.c
@@ -0,0 +1,119 @@
+/* Philips PCF50606 GPO Driver
+ *
+ * (C) 2006-2008 by Openmoko, Inc.
+ * Author: Balaji Rao <balajirrao@openmoko.org>
+ * All rights reserved.
+ *
+ * Broken down from monstrous PCF50606 driver mainly by
+ * Harald Welte, Andy Green Werner Almesberger and Matt Hsu
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+
+#include <linux/mfd/pcf50606/core.h>
+#include <linux/mfd/pcf50606/gpo.h>
+
+void pcf50606_gpo_set_active(struct pcf50606 *pcf, int gpo, int val)
+{
+ u8 reg, value, mask;
+
+ reg = gpo;
+ value = val;
+ mask = 0x07;
+
+ if (gpo == PCF50606_GPO2) {
+ value = val << 4;
+ mask = 0x07 << 4;
+ }
+ pcf50606_reg_set_bit_mask(pcf, reg, mask, value);
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_set_active);
+
+int pcf50606_gpo_get_active(struct pcf50606 *pcf, int gpo)
+{
+ u8 reg, value, shift = 0;
+
+ reg = gpo;
+ if (gpo == PCF50606_GPO2)
+ shift = 4;
+
+ value = pcf50606_reg_read(pcf, reg);
+
+ return (value >> shift) & 0x07;
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_get_active);
+
+void pcf50606_gpo_set_standby(struct pcf50606 *pcf, int gpo, int val)
+{
+ u8 reg;
+
+ if (gpo == PCF50606_GPO1 || gpo == PCF50606_GPO2) {
+ dev_err(pcf->dev, "Can't set standby settings for GPO[12]n");
+ return;
+ }
+
+ reg = gpo;
+
+ pcf50606_reg_set_bit_mask(pcf, gpo, 0x07 << 3, val);
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_set_standby);
+
+int pcf50606_gpo_get_standby(struct pcf50606 *pcf, int gpo)
+{
+ u8 reg, value;
+
+ if (gpo == PCF50606_GPO1 || gpo == PCF50606_GPO2) {
+ dev_err(pcf->dev, "Can't get standby settings for GPO[12]n");
+ return -EINVAL;
+ }
+
+ reg = gpo;
+ value = pcf50606_reg_read(pcf, reg);
+
+ return (value >> 3) & 0x07;
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_get_standby);
+
+void pcf50606_gpo_invert_set(struct pcf50606 *pcf, int gpo, int invert)
+{
+ u8 reg, value, mask;
+
+ reg = gpo;
+ value = !!invert << 6;
+ mask = 0x01 << 6;
+
+ if (gpo == PCF50606_GPO1) {
+ mask = 0x01 << 4;
+ value = !!invert << 4;
+ }
+ else if (gpo == PCF50606_GPO2) {
+ mask = 0x01 << 7;
+ value = !!invert << 7;
+ }
+
+ pcf50606_reg_set_bit_mask(pcf, reg, mask, value);
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_invert_set);
+
+int pcf50606_gpo_invert_get(struct pcf50606 *pcf, int gpo)
+{
+ u8 reg, value, shift;
+
+ reg = gpo;
+ shift = 6;
+
+ if (gpo == PCF50606_GPO1)
+ shift = 4;
+ else if (gpo == PCF50606_GPO2)
+ shift = 7;
+
+ value = pcf50606_reg_read(pcf, reg);
+
+ return (value >> shift) & 0x01;
+}
+EXPORT_SYMBOL_GPL(pcf50606_gpo_invert_get);