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author | Dhananjay Phadke <dhananjay@netxen.com> | 2009-04-07 22:50:48 +0000 |
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committer | David S. Miller <davem@davemloft.net> | 2009-04-08 15:58:31 -0700 |
commit | ea7eaa39ffadffaa8f1dd1a1f85fa38bf8ae9d39 (patch) | |
tree | 4ab24f8e5f47b86933935cec624c4592da78acaf /drivers/misc/hpilo.h | |
parent | a92e9e65f0068a291a677c627a747fae1f230284 (diff) |
netxen: cache align register map table
Aligning register offset translation table imporves performance
on rx side.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/misc/hpilo.h')
0 files changed, 0 insertions, 0 deletions