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authorAndrew Victor <andrew@sanpeople.com>2007-05-03 09:17:15 +0200
committerJeff Garzik <jeff@garzik.org>2007-05-08 01:30:21 -0400
commit6b4aea7352bed6e2fdb59a3fe24ce2b42b31c35a (patch)
tree414331d4c3790883a25a652c864098e650028e86 /drivers/net/arm/at91_ether.h
parent0b45d18643f0a3eab09616b8a1283b013a7417ea (diff)
AT91RM9200 Ethernet: Support additional PHYs
Add support for a number of new PHY's in the AT91RM9200 Ethernet driver. - Teridian 78Q21x3 - SMSC LAN83C185 (Patch from Luca Gamma) - National Semiconductor DP83848 (Patches from Ivan Kuten & Thomas Foldesi) Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/arm/at91_ether.h')
-rw-r--r--drivers/net/arm/at91_ether.h49
1 files changed, 28 insertions, 21 deletions
diff --git a/drivers/net/arm/at91_ether.h b/drivers/net/arm/at91_ether.h
index b6b665de2ea..a38fd2d053a 100644
--- a/drivers/net/arm/at91_ether.h
+++ b/drivers/net/arm/at91_ether.h
@@ -17,39 +17,46 @@
/* Davicom 9161 PHY */
-#define MII_DM9161_ID 0x0181b880
-#define MII_DM9161A_ID 0x0181b8a0
-
-/* Davicom specific registers */
-#define MII_DSCR_REG 16
-#define MII_DSCSR_REG 17
-#define MII_DSINTR_REG 21
+#define MII_DM9161_ID 0x0181b880
+#define MII_DM9161A_ID 0x0181b8a0
+#define MII_DSCR_REG 16
+#define MII_DSCSR_REG 17
+#define MII_DSINTR_REG 21
/* Intel LXT971A PHY */
-#define MII_LXT971A_ID 0x001378E0
-
-/* Intel specific registers */
-#define MII_ISINTE_REG 18
-#define MII_ISINTS_REG 19
-#define MII_LEDCTRL_REG 20
+#define MII_LXT971A_ID 0x001378E0
+#define MII_ISINTE_REG 18
+#define MII_ISINTS_REG 19
+#define MII_LEDCTRL_REG 20
/* Realtek RTL8201 PHY */
-#define MII_RTL8201_ID 0x00008200
+#define MII_RTL8201_ID 0x00008200
/* Broadcom BCM5221 PHY */
-#define MII_BCM5221_ID 0x004061e0
-
-/* Broadcom specific registers */
-#define MII_BCMINTR_REG 26
+#define MII_BCM5221_ID 0x004061e0
+#define MII_BCMINTR_REG 26
/* National Semiconductor DP83847 */
-#define MII_DP83847_ID 0x20005c30
+#define MII_DP83847_ID 0x20005c30
+
+/* National Semiconductor DP83848 */
+#define MII_DP83848_ID 0x20005c90
+#define MII_DPPHYSTS_REG 16
+#define MII_DPMICR_REG 17
+#define MII_DPMISR_REG 18
/* Altima AC101L PHY */
-#define MII_AC101L_ID 0x00225520
+#define MII_AC101L_ID 0x00225520
/* Micrel KS8721 PHY */
-#define MII_KS8721_ID 0x00221610
+#define MII_KS8721_ID 0x00221610
+
+/* Teridian 78Q2123/78Q2133 */
+#define MII_T78Q21x3_ID 0x000e7230
+#define MII_T78Q21INT_REG 17
+
+/* SMSC LAN83C185 */
+#define MII_LAN83C185_ID 0x0007C0A0
/* ........................................................................ */