diff options
| author | Aaron Salter <aaron.k.salter@intel.com> | 2007-01-06 09:51:41 -0800 |
|---|---|---|
| committer | Auke Kok <juke-jan.h.kok@intel.com> | 2007-01-06 09:51:41 -0800 |
| commit | a3ffab87588234e41248d8cebd8cec88db605d3c (patch) | |
| tree | 2498e880ae1ced44c53723bb813b9259bed82784 /drivers/net/ixgb/ixgb_hw.c | |
| parent | dfd341e4e467d146901a3accb761f04fda535433 (diff) | |
ixgb: Write RA register high word first, increment version
We need to disable the AV bit before flushing the low register.
Signed-off-by: <aaron.k.salter@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Diffstat (limited to 'drivers/net/ixgb/ixgb_hw.c')
| -rw-r--r-- | drivers/net/ixgb/ixgb_hw.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c index 02089b64e42..ecbf45861c6 100644 --- a/drivers/net/ixgb/ixgb_hw.c +++ b/drivers/net/ixgb/ixgb_hw.c @@ -399,8 +399,9 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw) /* Zero out the other 15 receive addresses. */ DEBUGOUT("Clearing RAR[1-15]\n"); for(i = 1; i < IXGB_RAR_ENTRIES; i++) { - IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); + /* Write high reg first to disable the AV bit first */ IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0); + IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0); } return; |