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authorSujith <Sujith.Manoharan@atheros.com>2009-02-16 13:23:12 +0530
committerJohn W. Linville <linville@tuxdriver.com>2009-02-27 14:52:37 -0500
commit70768496db9ee27d53d3d03d50c93fbf4c0198a0 (patch)
tree3ab32b158d56c420029a80d288ec739251f9b665 /drivers/net/wireless/ath9k/hw.c
parent362695e11a09ff016ef00dc45b934b1daf862091 (diff)
ath9k: Program the RTC registers correctly
This patch programs the RTC registers of AR9100 chipsets correctly during chip reset. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath9k/hw.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index e33c53fb6b7..1c02358b31f 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -1482,6 +1482,14 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
u32 rst_flags;
u32 tmpReg;
+ if (AR_SREV_9100(ah)) {
+ u32 val = REG_READ(ah, AR_RTC_DERIVED_CLK);
+ val &= ~AR_RTC_DERIVED_CLK_PERIOD;
+ val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD);
+ REG_WRITE(ah, AR_RTC_DERIVED_CLK, val);
+ (void)REG_READ(ah, AR_RTC_DERIVED_CLK);
+ }
+
REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
AR_RTC_FORCE_WAKE_ON_INT);