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authorLennert Buytenhek <buytenh@wantstofly.org>2007-10-19 04:10:28 +0200
committerDale Farnsworth <dale@farnsworth.org>2007-10-23 08:23:02 -0700
commit9f316841440c4c7e59227d0a3fe00a31ead1c436 (patch)
tree02be7ef1601c7863d6b9085363408832dfa514dc /drivers/net
parente2734d6c61e0fd2b0f3aeac01e8dcd36c99b1a13 (diff)
mv643xx_eth: Disable RX/TX byte swapping on little-endian systems
On little-endian systems, configure the SDMA unit with MV643XX_ETH_BLM_RX_NO_SWAP and MV643XX_ETH_BLM_TX_NO_SWAP. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Tzachi Perelstein <tzachi@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/mv643xx_eth.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/net/mv643xx_eth.h b/drivers/net/mv643xx_eth.h
index 20acd2e5245..d82b48d685c 100644
--- a/drivers/net/mv643xx_eth.h
+++ b/drivers/net/mv643xx_eth.h
@@ -266,10 +266,21 @@
#define MV643XX_ETH_IPG_INT_RX(value) ((value & 0x3fff) << 8)
+#if defined(__BIG_ENDIAN)
#define MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE \
MV643XX_ETH_RX_BURST_SIZE_4_64BIT | \
MV643XX_ETH_IPG_INT_RX(0) | \
MV643XX_ETH_TX_BURST_SIZE_4_64BIT
+#elif defined(__LITTLE_ENDIAN)
+#define MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE \
+ MV643XX_ETH_RX_BURST_SIZE_4_64BIT | \
+ MV643XX_ETH_BLM_RX_NO_SWAP | \
+ MV643XX_ETH_BLM_TX_NO_SWAP | \
+ MV643XX_ETH_IPG_INT_RX(0) | \
+ MV643XX_ETH_TX_BURST_SIZE_4_64BIT
+#else
+#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
+#endif
/* These macros describe Ethernet Port serial control reg (PSCR) bits */
#define MV643XX_ETH_SERIAL_PORT_DISABLE 0