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authorStefan Roese <sr@denx.de>2008-03-26 22:39:50 +1100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-03-26 07:27:54 -0500
commit2a7069190e7a7f19bd37e8c08e2bf02c8d6330f7 (patch)
tree3a13b234c45b32aa31a1c4ac2c84ed2f3b00a473 /drivers/oprofile/buffer_sync.h
parent145692a734cffa9c3c6f4523d015516406ce21eb (diff)
[POWERPC] 4xx: Add PPC4xx L2-cache support (440GX)
This patch adds support for the 256k L2 cache found on some IBM/AMCC 4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c) which currently "only" adds the L2 cache init code. Other common 4xx stuff can be added later here. The L2 cache handling code is a copy of Eugene's code in arch/ppc with small modifications. Tested on AMCC Taishan 440GX. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'drivers/oprofile/buffer_sync.h')
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