diff options
| author | Alan Cox <alan@redhat.com> | 2007-05-08 00:39:28 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-08 11:15:32 -0700 |
| commit | d37363409bacd1142c6e49edfb3e1f8b153d47dc (patch) | |
| tree | 2aa26a4e06020b714192f746a11c0be4c7b7c5fb /drivers/video/riva | |
| parent | dbe7e429fedb3fbc93b496cc1c3eb4fc28333ac0 (diff) | |
nvidiafb/rivafb: switch to pci_get refcounting
Switch to pci_get refcounting APIs
[adaplas]
Fix a long-standing bug where the return value of
pci_find_slot()/pci_get_bus_and_slot() is ignored.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/riva')
| -rw-r--r-- | drivers/video/riva/nv_driver.c | 6 | ||||
| -rw-r--r-- | drivers/video/riva/riva_hw.c | 12 |
2 files changed, 12 insertions, 6 deletions
diff --git a/drivers/video/riva/nv_driver.c b/drivers/video/riva/nv_driver.c index be630a0ccfd..a11026812d1 100644 --- a/drivers/video/riva/nv_driver.c +++ b/drivers/video/riva/nv_driver.c @@ -231,12 +231,14 @@ unsigned long riva_get_memlen(struct riva_par *par) case NV_ARCH_30: if(chipset == NV_CHIP_IGEFORCE2) { - dev = pci_find_slot(0, 1); + dev = pci_get_bus_and_slot(0, 1); pci_read_config_dword(dev, 0x7C, &amt); + pci_dev_put(dev); memlen = (((amt >> 6) & 31) + 1) * 1024; } else if (chipset == NV_CHIP_0x01F0) { - dev = pci_find_slot(0, 1); + dev = pci_get_bus_and_slot(0, 1); pci_read_config_dword(dev, 0x84, &amt); + pci_dev_put(dev); memlen = (((amt >> 4) & 127) + 1) * 1024; } else { switch ((NV_RD32(chip->PFB, 0x0000020C) >> 20) & diff --git a/drivers/video/riva/riva_hw.c b/drivers/video/riva/riva_hw.c index e0b8c521cc9..70bfd78eca8 100644 --- a/drivers/video/riva/riva_hw.c +++ b/drivers/video/riva/riva_hw.c @@ -1118,8 +1118,9 @@ static void nForceUpdateArbitrationSettings unsigned int uMClkPostDiv; struct pci_dev *dev; - dev = pci_find_slot(0, 3); + dev = pci_get_bus_and_slot(0, 3); pci_read_config_dword(dev, 0x6C, &uMClkPostDiv); + pci_dev_put(dev); uMClkPostDiv = (uMClkPostDiv >> 8) & 0xf; if(!uMClkPostDiv) uMClkPostDiv = 4; @@ -1132,8 +1133,9 @@ static void nForceUpdateArbitrationSettings sim_data.enable_video = 0; sim_data.enable_mp = 0; - dev = pci_find_slot(0, 1); + dev = pci_get_bus_and_slot(0, 1); pci_read_config_dword(dev, 0x7C, &sim_data.memory_type); + pci_dev_put(dev); sim_data.memory_type = (sim_data.memory_type >> 12) & 1; sim_data.memory_width = 64; @@ -2112,12 +2114,14 @@ static void nv10GetConfig * Fill in chip configuration. */ if(chipset == NV_CHIP_IGEFORCE2) { - dev = pci_find_slot(0, 1); + dev = pci_get_bus_and_slot(0, 1); pci_read_config_dword(dev, 0x7C, &amt); + pci_dev_put(dev); chip->RamAmountKBytes = (((amt >> 6) & 31) + 1) * 1024; } else if(chipset == NV_CHIP_0x01F0) { - dev = pci_find_slot(0, 1); + dev = pci_get_bus_and_slot(0, 1); pci_read_config_dword(dev, 0x84, &amt); + pci_dev_put(dev); chip->RamAmountKBytes = (((amt >> 4) & 127) + 1) * 1024; } else { switch ((NV_RD32(chip->PFB, 0x0000020C) >> 20) & 0x000000FF) |