diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-02-27 11:49:05 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-02-27 11:49:05 -0500 |
commit | cccc65a3b60edaf721cdee5a14f68ba009341822 (patch) | |
tree | a458d28f70cbe0e848596aad6005442a2621d388 /drivers/video | |
parent | ba70d0614728892b86b2be2f7eae0c696b436461 (diff) | |
parent | e95a9ec1bb66e07b138861c743192f06e7b3e4de (diff) |
Merge branch 'master'
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/Kconfig | 2 | ||||
-rw-r--r-- | drivers/video/asiliantfb.c | 21 | ||||
-rw-r--r-- | drivers/video/aty/radeon_pm.c | 19 | ||||
-rw-r--r-- | drivers/video/au1100fb.c | 3 | ||||
-rw-r--r-- | drivers/video/console/vgacon.c | 67 | ||||
-rw-r--r-- | drivers/video/gbefb.c | 3 |
6 files changed, 65 insertions, 50 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index e64ed16bd42..f5079c78ba4 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -520,7 +520,7 @@ config FB_GBE config FB_GBE_MEM int "Video memory size in MB" depends on FB_GBE - default 8 + default 4 help This is the amount of memory reserved for the framebuffer, which can be any value between 1MB and 8MB. diff --git a/drivers/video/asiliantfb.c b/drivers/video/asiliantfb.c index 69f75547865..c924d81f797 100644 --- a/drivers/video/asiliantfb.c +++ b/drivers/video/asiliantfb.c @@ -322,32 +322,29 @@ static int asiliantfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, writeb(green, mmio_base + 0x791); writeb(blue, mmio_base + 0x791); - switch(p->var.bits_per_pixel) { - case 15: - if (regno < 16) { + if (regno < 16) { + switch(p->var.red.offset) { + case 10: /* RGB 555 */ ((u32 *)(p->pseudo_palette))[regno] = ((red & 0xf8) << 7) | ((green & 0xf8) << 2) | ((blue & 0xf8) >> 3); - } - break; - case 16: - if (regno < 16) { + break; + case 11: /* RGB 565 */ ((u32 *)(p->pseudo_palette))[regno] = ((red & 0xf8) << 8) | ((green & 0xfc) << 3) | ((blue & 0xf8) >> 3); - } - break; - case 24: - if (regno < 24) { + break; + case 16: /* RGB 888 */ ((u32 *)(p->pseudo_palette))[regno] = (red << 16) | (green << 8) | (blue); + break; } - break; } + return 0; } diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c index 556895e9964..1f8d805c61e 100644 --- a/drivers/video/aty/radeon_pm.c +++ b/drivers/video/aty/radeon_pm.c @@ -1321,8 +1321,6 @@ static void radeon_pm_full_reset_sdram(struct radeonfb_info *rinfo) mdelay( 15); } -#ifdef CONFIG_PPC_OF - static void radeon_pm_reset_pad_ctlr_strength(struct radeonfb_info *rinfo) { u32 tmp, tmp2; @@ -1836,6 +1834,8 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo) radeon_pm_m10_enable_lvds_spread_spectrum(rinfo); } +#ifdef CONFIG_PPC_OF + static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) { OUTREG(MC_CNTL, rinfo->save_regs[46]); @@ -2728,13 +2728,23 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk) printk("radeonfb: Dynamic Clock Power Management disabled\n"); } +#if defined(CONFIG_PM) /* Check if we can power manage on suspend/resume. We can do * D2 on M6, M7 and M9, and we can resume from D3 cold a few other * "Mac" cards, but that's all. We need more infos about what the * BIOS does tho. Right now, all this PM stuff is pmac-only for that * reason. --BenH */ -#if defined(CONFIG_PM) && defined(CONFIG_PPC_PMAC) + /* Special case for Samsung P35 laptops + */ + if ((rinfo->pdev->vendor == PCI_VENDOR_ID_ATI) && + (rinfo->pdev->device == PCI_CHIP_RV350_NP) && + (rinfo->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG) && + (rinfo->pdev->subsystem_device == 0xc00c)) { + rinfo->reinit_func = radeon_reinitialize_M10; + rinfo->pm_mode |= radeon_pm_off; + } +#if defined(CONFIG_PPC_PMAC) if (_machine == _MACH_Pmac && rinfo->of_node) { if (rinfo->is_mobility && rinfo->pm_reg && rinfo->family <= CHIP_FAMILY_RV250) @@ -2778,7 +2788,8 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk) OUTREG(TV_DAC_CNTL, INREG(TV_DAC_CNTL) | 0x07000000); #endif } -#endif /* defined(CONFIG_PM) && defined(CONFIG_PPC_PMAC) */ +#endif /* defined(CONFIG_PPC_PMAC) */ +#endif /* defined(CONFIG_PM) */ } void radeonfb_pm_exit(struct radeonfb_info *rinfo) diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index 2406899f120..3d04b2def0f 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c @@ -49,6 +49,7 @@ #include <linux/interrupt.h> #include <linux/ctype.h> #include <linux/dma-mapping.h> +#include <linux/platform_device.h> #include <asm/mach-au1x00/au1000.h> @@ -406,7 +407,7 @@ int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) vma->vm_flags |= VM_IO; - if (io_remap_page_range(vma, vma->vm_start, off, + if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, vma->vm_end - vma->vm_start, vma->vm_page_prot)) { return -EAGAIN; diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index 12d9329d140..5a86978537d 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c @@ -509,57 +509,60 @@ static int vgacon_doresize(struct vc_data *c, { unsigned long flags; unsigned int scanlines = height * c->vc_font.height; - u8 scanlines_lo, r7, vsync_end, mode, max_scan; + u8 scanlines_lo = 0, r7 = 0, vsync_end = 0, mode, max_scan; spin_lock_irqsave(&vga_lock, flags); - outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg); - max_scan = inb_p(vga_video_port_val); - - if (max_scan & 0x80) - scanlines <<= 1; - vgacon_xres = width * VGA_FONTWIDTH; vgacon_yres = height * c->vc_font.height; - outb_p(VGA_CRTC_MODE, vga_video_port_reg); - mode = inb_p(vga_video_port_val); + if (vga_video_type >= VIDEO_TYPE_VGAC) { + outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg); + max_scan = inb_p(vga_video_port_val); - if (mode & 0x04) - scanlines >>= 1; + if (max_scan & 0x80) + scanlines <<= 1; - scanlines -= 1; - scanlines_lo = scanlines & 0xff; + outb_p(VGA_CRTC_MODE, vga_video_port_reg); + mode = inb_p(vga_video_port_val); - outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); - r7 = inb_p(vga_video_port_val) & ~0x42; + if (mode & 0x04) + scanlines >>= 1; - if (scanlines & 0x100) - r7 |= 0x02; - if (scanlines & 0x200) - r7 |= 0x40; + scanlines -= 1; + scanlines_lo = scanlines & 0xff; - /* deprotect registers */ - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - vsync_end = inb_p(vga_video_port_val); - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - outb_p(vsync_end & ~0x80, vga_video_port_val); + outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); + r7 = inb_p(vga_video_port_val) & ~0x42; + + if (scanlines & 0x100) + r7 |= 0x02; + if (scanlines & 0x200) + r7 |= 0x40; + + /* deprotect registers */ + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + vsync_end = inb_p(vga_video_port_val); + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + outb_p(vsync_end & ~0x80, vga_video_port_val); + } outb_p(VGA_CRTC_H_DISP, vga_video_port_reg); outb_p(width - 1, vga_video_port_val); outb_p(VGA_CRTC_OFFSET, vga_video_port_reg); outb_p(width >> 1, vga_video_port_val); - outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg); - outb_p(scanlines_lo, vga_video_port_val); - outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); - outb_p(r7,vga_video_port_val); + if (vga_video_type >= VIDEO_TYPE_VGAC) { + outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg); + outb_p(scanlines_lo, vga_video_port_val); + outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); + outb_p(r7,vga_video_port_val); - /* reprotect registers */ - outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); - outb_p(vsync_end, vga_video_port_val); + /* reprotect registers */ + outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); + outb_p(vsync_end, vga_video_port_val); + } spin_unlock_irqrestore(&vga_lock, flags); - return 0; } diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c index c9a7cdf6d54..5e25b986019 100644 --- a/drivers/video/gbefb.c +++ b/drivers/video/gbefb.c @@ -656,12 +656,15 @@ static int gbefb_set_par(struct fb_info *info) switch (bytesPerPixel) { case 1: SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_I8); + info->fix.visual = FB_VISUAL_PSEUDOCOLOR; break; case 2: SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_ARGB5); + info->fix.visual = FB_VISUAL_TRUECOLOR; break; case 4: SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_RGB8); + info->fix.visual = FB_VISUAL_TRUECOLOR; break; } SET_GBE_FIELD(WID, BUF, val, GBE_BMODE_BOTH); |