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authorLennert Buytenhek <buytenh@marvell.com>2009-01-19 17:16:00 -0800
committerDavid S. Miller <davem@davemloft.net>2009-01-19 17:58:06 -0800
commite0c6ef9388b58f297937fc9651331941d1579b25 (patch)
treeb5468cae5a3b0299d720786105f78522b0a97c1c /drivers
parent8b9d3728977760f6bd1317c4420890f73695354e (diff)
Revert "mv643xx_eth: use longer DMA bursts".
This reverts commit cd4ccf76bfd2c36d351e68be7e6a597268f98a1a. On the Pegasos board, we can't do DMA burst that are longer than one cache line. For now, go back to using 32 byte DMA bursts for all mv643xx_eth platforms -- we can switch the ARM-based platforms back to doing long 128 byte bursts in the next development cycle. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reported-by: Alan Curry <pacman@kosh.dhis.org> Reported-by: Gabriel Paubert <paubert@iram.es> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/mv643xx_eth.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 7253a499d9c..e2aa468d40f 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -136,21 +136,23 @@ static char mv643xx_eth_driver_version[] = "1.4";
/*
* SDMA configuration register.
*/
+#define RX_BURST_SIZE_4_64BIT (2 << 1)
#define RX_BURST_SIZE_16_64BIT (4 << 1)
#define BLM_RX_NO_SWAP (1 << 4)
#define BLM_TX_NO_SWAP (1 << 5)
+#define TX_BURST_SIZE_4_64BIT (2 << 22)
#define TX_BURST_SIZE_16_64BIT (4 << 22)
#if defined(__BIG_ENDIAN)
#define PORT_SDMA_CONFIG_DEFAULT_VALUE \
- (RX_BURST_SIZE_16_64BIT | \
- TX_BURST_SIZE_16_64BIT)
+ (RX_BURST_SIZE_4_64BIT | \
+ TX_BURST_SIZE_4_64BIT)
#elif defined(__LITTLE_ENDIAN)
#define PORT_SDMA_CONFIG_DEFAULT_VALUE \
- (RX_BURST_SIZE_16_64BIT | \
- BLM_RX_NO_SWAP | \
- BLM_TX_NO_SWAP | \
- TX_BURST_SIZE_16_64BIT)
+ (RX_BURST_SIZE_4_64BIT | \
+ BLM_RX_NO_SWAP | \
+ BLM_TX_NO_SWAP | \
+ TX_BURST_SIZE_4_64BIT)
#else
#error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
#endif