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authorWu Zhangjin <wuzhangjin@gmail.com>2010-05-07 00:59:46 +0800
committerRalf Baechle <ralf@linux-mips.org>2010-05-15 21:59:54 +0100
commit4e73238d163c6fcf001264832701d2a6d4927672 (patch)
treebf8b9aa38ffec794d44cb1a81ee99c52e4d6b5f0 /drivers
parent46afb8296c2494bfce17064124b253eb9b176ef9 (diff)
MIPS: Oprofile: Fix Loongson irq handler
The interrupt enable bit for the performance counters is in the Control Register $24, not in the counter register. loongson2_perfcount_handler(), we need to use Reported-by: Xu Hengyang <hengyang@mail.ustc.edu.cn> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1198/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
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