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authorAndreas Herrmann <andreas.herrmann3@amd.com>2008-09-18 21:12:10 +0200
committerThomas Gleixner <tglx@linutronix.de>2008-09-23 11:38:53 +0200
commit09bfeea13cea843fb03eaa96b5d891fa0abdcc90 (patch)
tree83777d26c3029d373d67f61f6d08884ae275cea3 /fs/reiserfs/hashes.c
parenta8d6829044901a67732904be5f1eacdf8539604f (diff)
x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC
Impact: Functional TSC is marked unstable on AMD family 0x10 and 0x11 CPUs. This would be wrong because for those CPUs "invariant TSC" means: "The TSC counts at the same rate in all P-states, all C states, S0, or S1" (See "Processor BIOS and Kernel Developer's Guides" for those CPUs.) [ tglx: Changed C1E to AMD C1E in the printks to avoid confusion with Intel C1E ] Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'fs/reiserfs/hashes.c')
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