diff options
| author | Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> | 2007-05-10 22:33:02 -0700 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-11 17:41:52 +0100 |
| commit | 2fd0237538480c8d704c385b6f9abc3f6c46b760 (patch) | |
| tree | 4f4052fb01ec00d4717bc7741602e02aa9833ef6 /include/asm-arm/arch-iop13xx/irqs.h | |
| parent | 87b247c41674e29f90bf4938799ab079951ccc6b (diff) | |
[ARM] iop13xx: msi support
Enable devices to signal interrupts via PCI memory cycles.
rev6:
* fix enable/disable typo, Michael Ellerman
rev5:
* fix up ack, enable, and disable for iop13xx_msi_chip
rev4:
* move smp compile fix to separate patch
* use dynamic_irq_init in create_irq()
* hookup mask/unmask routines in iop13xx_msi_chip
rev3:
* change msi.c to use linux/smp.h instead of asm/smp.h
* call dynamic_irq_cleanup at destroy_irq time
rev2:
* destroy_irq did not take the full 128 bits of msi_irq_in_use into account
* added missing '&' for calls to test_and_set_bit and clear_bit
[ebiederm@xmission.com: review comments/suggestions]
[dan.j.williams@intel.com: cleanups/forward port to 2.6-git]
Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Acked-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop13xx/irqs.h')
| -rw-r--r-- | include/asm-arm/arch-iop13xx/irqs.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h index 5c6fac2a400..054e7acb5bf 100644 --- a/include/asm-arm/arch-iop13xx/irqs.h +++ b/include/asm-arm/arch-iop13xx/irqs.h @@ -168,7 +168,7 @@ static inline u32 read_intpnd_3(void) #define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ #define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ #define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ -#define IRQ_IOP13XX_RSVD_113 (113) /* 17 */ +#define IRQ_IOP13XX_INBD_MSI (113) /* 17 */ #define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ #define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ #define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ @@ -184,7 +184,13 @@ static inline u32 read_intpnd_3(void) #define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ #define IRQ_IOP13XX_HPI (127) /* 31 */ +#ifdef CONFIG_PCI_MSI +#define IRQ_IOP13XX_MSI_0 (IRQ_IOP13XX_HPI + 1) +#define NR_IOP13XX_IRQS (IRQ_IOP13XX_MSI_0 + 128) +#else #define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) +#endif + #define NR_IRQS NR_IOP13XX_IRQS #endif /* _IOP13XX_IRQ_H_ */ |