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authorDmitry Torokhov <dtor_core@ameritech.net>2005-09-09 20:14:47 -0500
committerDmitry Torokhov <dtor_core@ameritech.net>2005-09-09 20:14:47 -0500
commitd344c5e0856ad03278d8700b503762dbc8b86e12 (patch)
treea6d893a643470a3c2580a58f3228a55fa1fd1d82 /include/asm-arm/arch-omap/irqs.h
parent010988e888a0abbe7118635c1b33d049caae6b29 (diff)
parent87fc767b832ef5a681a0ff9d203c3289bc3be2bf (diff)
Manual merge with Linus
Diffstat (limited to 'include/asm-arm/arch-omap/irqs.h')
-rw-r--r--include/asm-arm/arch-omap/irqs.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 0d05a7c957d..74e108ccac1 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -135,7 +135,6 @@
/*
* OMAP-1510 specific IRQ numbers for interrupt handler 2
*/
-#define INT_1510_OS_32kHz_TIMER (22 + IH2_BASE)
#define INT_1510_COM_SPI_RO (31 + IH2_BASE)
/*
@@ -232,6 +231,11 @@
#define INT_730_DMA_CH15 (62 + IH2_BASE)
#define INT_730_NAND (63 + IH2_BASE)
+#define INT_24XX_GPIO_BANK1 29
+#define INT_24XX_GPIO_BANK2 30
+#define INT_24XX_GPIO_BANK3 31
+#define INT_24XX_GPIO_BANK4 32
+
/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192