diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2007-07-22 16:59:44 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-07-22 17:06:02 +0100 |
| commit | 530ef3c2a92b3c6a9901ac7e04d1e6c0077a9f2d (patch) | |
| tree | 5f57088e3ff3bcaacd8df5ed0b8f01365e71477a /include/asm-arm/plat-s3c/regs-timer.h | |
| parent | bf2a3a26d18679c94eca973cb8741e3c1ac53c43 (diff) | |
[ARM] 4521/2: S3C: Reorganise VA mapping headers
Reorganise the definition of the virtual addresses
used into a common header and update the users to
rename S3C2410 items into a more common S3C defined
macros.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/plat-s3c/regs-timer.h')
| -rw-r--r-- | include/asm-arm/plat-s3c/regs-timer.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/include/asm-arm/plat-s3c/regs-timer.h index 6f8fe432fe3..8b0d594397b 100644 --- a/include/asm-arm/plat-s3c/regs-timer.h +++ b/include/asm-arm/plat-s3c/regs-timer.h @@ -14,12 +14,12 @@ #ifndef __ASM_ARCH_REGS_TIMER_H #define __ASM_ARCH_REGS_TIMER_H "$Id: timer.h,v 1.4 2003/05/06 19:30:50 ben Exp $" -#define S3C2410_TIMERREG(x) (S3C24XX_VA_TIMER + (x)) -#define S3C2410_TIMERREG2(tmr,reg) S3C2410_TIMERREG((reg)+0x0c+((tmr)*0x0c)) +#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x)) +#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c)) -#define S3C2410_TCFG0 S3C2410_TIMERREG(0x00) -#define S3C2410_TCFG1 S3C2410_TIMERREG(0x04) -#define S3C2410_TCON S3C2410_TIMERREG(0x08) +#define S3C2410_TCFG0 S3C_TIMERREG(0x00) +#define S3C2410_TCFG1 S3C_TIMERREG(0x04) +#define S3C2410_TCON S3C_TIMERREG(0x08) #define S3C2410_TCFG_PRESCALER0_MASK (255<<0) #define S3C2410_TCFG_PRESCALER1_MASK (255<<8) @@ -71,9 +71,9 @@ /* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */ -#define S3C2410_TCNTB(tmr) S3C2410_TIMERREG2(tmr, 0x00) -#define S3C2410_TCMPB(tmr) S3C2410_TIMERREG2(tmr, 0x04) -#define S3C2410_TCNTO(tmr) S3C2410_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08)) +#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00) +#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04) +#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08)) #define S3C2410_TCON_T4RELOAD (1<<22) #define S3C2410_TCON_T4MANUALUPD (1<<21) |