diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2007-07-22 16:23:02 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-07-22 17:06:30 +0100 |
| commit | 06cfa556949ead5d3c00dc68108c443be8dd8d17 (patch) | |
| tree | 245ac3b044136a44cefbad8a56632f7dff1f70f7 /include/asm-arm/plat-s3c24xx/regs-spi.h | |
| parent | dd1313a167a9d29c349b3244dffac274bb0bf486 (diff) | |
[ARM] 4524/1: S3C: Move register out of include/asm-arm/arch-s3c2410
Move register and other definitions out of the
include/asm-arm/arch-s3c2410 into the the arch
directories of include/asm-arm/plat-s3c24xx and
include/asm-arm/plat-s3c.
This move is in preperation of the merging of
s3c2400 and s3c6400.
The following git mv commands are needed before
this patch can be applied:
git mv include/asm-arm/arch-s3c2410/regs-ac97.h include/asm-arm/plat-s3c/regs-ac97.h
git mv include/asm-arm/arch-s3c2410/regs-adc.h include/asm-arm/plat-s3c/regs-adc.h
git mv include/asm-arm/arch-s3c2410/regs-iis.h include/asm-arm/plat-s3c24xx/regs-iis.h
git mv include/asm-arm/arch-s3c2410/regs-spi.h include/asm-arm/plat-s3c24xx/regs-spi.h
git mv include/asm-arm/arch-s3c2410/regs-udc.h include/asm-arm/plat-s3c24xx/regs-udc.h
git mv include/asm-arm/arch-s3c2410/udc.h include/asm-arm/plat-s3c24xx/udc.h
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/plat-s3c24xx/regs-spi.h')
| -rw-r--r-- | include/asm-arm/plat-s3c24xx/regs-spi.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/include/asm-arm/plat-s3c24xx/regs-spi.h b/include/asm-arm/plat-s3c24xx/regs-spi.h new file mode 100644 index 00000000000..4a499a13825 --- /dev/null +++ b/include/asm-arm/plat-s3c24xx/regs-spi.h @@ -0,0 +1,54 @@ +/* linux/include/asm-arm/arch-s3c2410/regs-spi.h + * + * Copyright (c) 2004 Fetron GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 SPI register definition +*/ + +#ifndef __ASM_ARCH_REGS_SPI_H +#define __ASM_ARCH_REGS_SPI_H + +#define S3C2410_SPI1 (0x20) +#define S3C2412_SPI1 (0x100) + +#define S3C2410_SPCON (0x00) + +#define S3C2410_SPCON_SMOD_DMA (2<<5) /* DMA mode */ +#define S3C2410_SPCON_SMOD_INT (1<<5) /* interrupt mode */ +#define S3C2410_SPCON_SMOD_POLL (0<<5) /* polling mode */ +#define S3C2410_SPCON_ENSCK (1<<4) /* Enable SCK */ +#define S3C2410_SPCON_MSTR (1<<3) /* Master/Slave select + 0: slave, 1: master */ +#define S3C2410_SPCON_CPOL_HIGH (1<<2) /* Clock polarity select */ +#define S3C2410_SPCON_CPOL_LOW (0<<2) /* Clock polarity select */ + +#define S3C2410_SPCON_CPHA_FMTB (1<<1) /* Clock Phase Select */ +#define S3C2410_SPCON_CPHA_FMTA (0<<1) /* Clock Phase Select */ + +#define S3C2410_SPCON_TAGD (1<<0) /* Tx auto garbage data mode */ + + +#define S3C2410_SPSTA (0x04) + +#define S3C2410_SPSTA_DCOL (1<<2) /* Data Collision Error */ +#define S3C2410_SPSTA_MULD (1<<1) /* Multi Master Error */ +#define S3C2410_SPSTA_READY (1<<0) /* Data Tx/Rx ready */ + + +#define S3C2410_SPPIN (0x08) + +#define S3C2410_SPPIN_ENMUL (1<<2) /* Multi Master Error detect */ +#define S3C2410_SPPIN_RESERVED (1<<1) +#define S3C2400_SPPIN_nCS (1<<1) /* SPI Card Select */ +#define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */ + + +#define S3C2410_SPPRE (0x0C) +#define S3C2410_SPTDAT (0x10) +#define S3C2410_SPRDAT (0x14) + +#endif /* __ASM_ARCH_REGS_SPI_H */ |