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authorMike Frysinger <michael.frysinger@analog.com>2007-08-05 17:32:25 +0800
committerBryan Wu <bryan.wu@analog.com>2007-08-05 17:32:25 +0800
commitbc8c84c947ad65cd2850c43f96bea825e426f9eb (patch)
treeb0115bbd27e6158d753e4fc58633bcbb510b5c2c /include/asm-blackfin/mach-bf537/anomaly.h
parentfb51d566803413d2682ca718aef1c6f946fdab05 (diff)
Blackfin arch: update to latest anomaly sheets
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf537/anomaly.h')
-rw-r--r--include/asm-blackfin/mach-bf537/anomaly.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h
index dc736c61980..3803f156bf1 100644
--- a/include/asm-blackfin/mach-bf537/anomaly.h
+++ b/include/asm-blackfin/mach-bf537/anomaly.h
@@ -44,8 +44,6 @@
#define ANOMALY_05000122 (1)
/* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */
#define ANOMALY_05000157 (__SILICON_REVISION__ < 2)
-/* PPI Data Lengths Between 8 and 16 do not zero out upper bits*/
-#define ANOMALY_05000166 (1) /* XXX: deleted from BF537 sheet ? */
/* PPI_DELAY not functional in PPI modes with 0 frame syncs */
#define ANOMALY_05000180 (1)
/* Instruction Cache Is Not Functional */