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authorDavid Woodhouse <dwmw2@infradead.org>2007-08-01 11:23:57 +0100
committerDavid Woodhouse <dwmw2@infradead.org>2007-08-01 11:23:57 +0100
commit440fdb53b4ae58602711b5b8c3a139ace2404dbb (patch)
treec6fb88d6ad537ec53aeecadc75a61ab6147d4c9c /include/asm-blackfin/mach-bf561/cdefBF561.h
parent8b2b403ce0f1a816b7a6a4f47c8798003b26c07a (diff)
parent8d4fbcfbe0a4bfc73e7f0297c59ae514e1f1436f (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-blackfin/mach-bf561/cdefBF561.h')
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 1a8ec9e4692..6e87ab269ff 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -81,6 +81,12 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
#define bfin_read_CHIPID() bfin_read32(CHIPID)
+/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
+#define bfin_read_SWRST() bfin_read_SICA_SWRST()
+#define bfin_write_SWRST() bfin_write_SICA_SWRST()
+#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
+#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
+
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)
#define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST,val)