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authorJohn Keller <jpk@sgi.com>2007-05-10 22:42:44 -0700
committerTony Luck <tony.luck@intel.com>2007-05-11 09:35:38 -0700
commit25d61578daae697c4a0eb817f42a868af9824f82 (patch)
treeec4ac10132f0b12a822dba6a53d05bab78ec3760 /include/asm-ia64
parent3e3d32770204ea24cf71919a90d9ccfc2bd407dd (diff)
[IA64] SN: validate smp_affinity mask on intr redirect
On SN, only allow one bit to be set in the smp_affinty mask when redirecting an interrupt. Currently setting multiple bits is allowed, but only the first bit is used in determining the CPU to redirect to. This has caused confusion among some customers. [akpm@linux-foundation.org: fixes] Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64')
-rw-r--r--include/asm-ia64/irq.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h
index 79479e2c696..67221615e31 100644
--- a/include/asm-ia64/irq.h
+++ b/include/asm-ia64/irq.h
@@ -11,6 +11,9 @@
* 02/29/00 D.Mosberger moved most things into hw_irq.h
*/
+#include <linux/types.h>
+#include <linux/cpumask.h>
+
#define NR_IRQS 256
#define NR_IRQ_VECTORS NR_IRQS
@@ -29,5 +32,8 @@ extern void disable_irq (unsigned int);
extern void disable_irq_nosync (unsigned int);
extern void enable_irq (unsigned int);
extern void set_irq_affinity_info (unsigned int irq, int dest, int redir);
+bool is_affinity_mask_valid(cpumask_t cpumask);
+
+#define is_affinity_mask_valid is_affinity_mask_valid
#endif /* _ASM_IA64_IRQ_H */