diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2006-03-20 11:58:02 -0600 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2006-03-20 11:58:02 -0600 |
commit | 1a02e59a2970f9ed28ab51d3b08624b79e54d848 (patch) | |
tree | 470cce472be3b08c160e0c569648e7228651b12a /include/asm-mips/io.h | |
parent | ebcff3c773b42bce6182ec16485abca4e53fba97 (diff) | |
parent | 2c276603c3e5ebf38155a9d1fbbda656d52d138e (diff) |
Merge branch 'master'
Diffstat (limited to 'include/asm-mips/io.h')
-rw-r--r-- | include/asm-mips/io.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 5a4c8a54b8f..8c011aa61af 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -283,6 +283,24 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, __ioremap_mode((offset), (size), _CACHE_UNCACHED) /* + * ioremap_cachable - map bus memory into CPU space + * @offset: bus address of the memory + * @size: size of the resource to map + * + * ioremap_nocache performs a platform specific sequence of operations to + * make bus memory CPU accessible via the readb/readw/readl/writeb/ + * writew/writel functions and the other mmio helpers. The returned + * address is not guaranteed to be usable directly as a virtual + * address. + * + * This version of ioremap ensures that the memory is marked cachable by + * the CPU. Also enables full write-combining. Useful for some + * memory-like regions on I/O busses. + */ +#define ioremap_cachable(offset, size) \ + __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT) + +/* * These two are MIPS specific ioremap variant. ioremap_cacheable_cow * requests a cachable mapping, ioremap_uncached_accelerated requests a * mapping using the uncached accelerated mode which isn't supported on |