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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2006-06-13 13:59:01 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 17:39:24 +0100
commit4a0312fca6599299bbed944ce09278d90388a3e5 (patch)
treecde9b9d353eab1aa7ab062c2a958986bd45c1f24 /include/asm-mips/mach-rm200
parentb00f473e1af9a11454e572de1ea446eb672e700d (diff)
[MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
Added support for RM200C machines with big endian firmware Added support for RM200-C40 (R5000 support) Signed-off-by: Florian Lohoff <flo@rfc822.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-rm200')
-rw-r--r--include/asm-mips/mach-rm200/cpu-feature-overrides.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
index 91e7cf5f2bf..01587832bc9 100644
--- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h
@@ -35,10 +35,8 @@
#define cpu_has_nofpuex 0
#define cpu_has_64bits 1
-#define cpu_has_subset_pcaches 0 /* No S-cache on R5000 I think ... */
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
-#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */
#define cpu_has_mips32r1 0
#define cpu_has_mips32r2 0