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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
commit | d04cdb64212eb5ae6a98026a97dda626e40e8e9a (patch) | |
tree | b6a7dbb21ccfceb915844e9a330b3d3dfcaf3c5b /include/asm-mips/r4kcache.h | |
parent | 2f8600dff2b140096a7df781884e918a16aa90e0 (diff) | |
parent | ec1248e70edc5cf7b485efcc7b41e44e10f422e5 (diff) |
Merge ../linux-2.6
Diffstat (limited to 'include/asm-mips/r4kcache.h')
-rw-r--r-- | include/asm-mips/r4kcache.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h index 9632c27dad1..90c37470097 100644 --- a/include/asm-mips/r4kcache.h +++ b/include/asm-mips/r4kcache.h @@ -257,7 +257,8 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ \ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ { \ - unsigned long start = page; \ + unsigned long indexmask = current_cpu_data.desc.waysize - 1; \ + unsigned long start = INDEX_BASE + (page & indexmask); \ unsigned long end = start + PAGE_SIZE; \ unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ unsigned long ws_end = current_cpu_data.desc.ways << \ @@ -302,5 +303,6 @@ __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, ) __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, ) /* blast_inv_dcache_range */ __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, ) +__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, ) #endif /* _ASM_R4KCACHE_H */ |