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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-09-26 23:43:40 +0900
committerRalf Baechle <ralf@linux-mips.org>2006-10-01 23:16:57 +0100
commiteae6c0da9df81300895949897c0451423340ac40 (patch)
treea5e2d512d72e316a8aa79ec20286d1f2a8a98db3 /include/asm-mips
parentd834c16516d1ebec4766fc58c059bf01311e6045 (diff)
[MIPS] lockdep: fix TRACE_IRQFLAGS_SUPPORT
In handle_sys and its variants, we must reload some registers which might be clobbered by trace_hardirqs_on(). Also we must make sure trace_hardirqs_on() called in kernel level (not exception level). Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/irqflags.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/asm-mips/irqflags.h b/include/asm-mips/irqflags.h
index 43ca09a3a3d..46bf5de5ac7 100644
--- a/include/asm-mips/irqflags.h
+++ b/include/asm-mips/irqflags.h
@@ -213,12 +213,37 @@ static inline int raw_irqs_disabled_flags(unsigned long flags)
* Do the CPU's IRQ-state tracing from assembly code.
*/
#ifdef CONFIG_TRACE_IRQFLAGS
+/* Reload some registers clobbered by trace_hardirqs_on */
+#ifdef CONFIG_64BIT
+# define TRACE_IRQS_RELOAD_REGS \
+ LONG_L $11, PT_R11(sp); \
+ LONG_L $10, PT_R10(sp); \
+ LONG_L $9, PT_R9(sp); \
+ LONG_L $8, PT_R8(sp); \
+ LONG_L $7, PT_R7(sp); \
+ LONG_L $6, PT_R6(sp); \
+ LONG_L $5, PT_R5(sp); \
+ LONG_L $4, PT_R4(sp); \
+ LONG_L $2, PT_R2(sp)
+#else
+# define TRACE_IRQS_RELOAD_REGS \
+ LONG_L $7, PT_R7(sp); \
+ LONG_L $6, PT_R6(sp); \
+ LONG_L $5, PT_R5(sp); \
+ LONG_L $4, PT_R4(sp); \
+ LONG_L $2, PT_R2(sp)
+#endif
# define TRACE_IRQS_ON \
+ CLI; /* make sure trace_hardirqs_on() is called in kernel level */ \
jal trace_hardirqs_on
+# define TRACE_IRQS_ON_RELOAD \
+ TRACE_IRQS_ON; \
+ TRACE_IRQS_RELOAD_REGS
# define TRACE_IRQS_OFF \
jal trace_hardirqs_off
#else
# define TRACE_IRQS_ON
+# define TRACE_IRQS_ON_RELOAD
# define TRACE_IRQS_OFF
#endif