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authorAnton Altaparmakov <aia21@cantab.net>2005-10-30 21:00:04 +0000
committerAnton Altaparmakov <aia21@cantab.net>2005-10-30 21:00:04 +0000
commit07b188ab773e183871e57b33ae37bf635c9f12ba (patch)
tree311df8a0dd12fb7bd3e9b5b1a5ca500f0428d679 /include/asm-parisc/spinlock.h
parent47c564e10f219f867bdb49225972749a43485a47 (diff)
parent9f75e1eff3edb2bb07349b94c28f4f2a6c66ca43 (diff)
Merge branch 'master' of /usr/src/ntfs-2.6/
Diffstat (limited to 'include/asm-parisc/spinlock.h')
-rw-r--r--include/asm-parisc/spinlock.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
index 43eaa6e742e..7c3f406a746 100644
--- a/include/asm-parisc/spinlock.h
+++ b/include/asm-parisc/spinlock.h
@@ -5,11 +5,6 @@
#include <asm/processor.h>
#include <asm/spinlock_types.h>
-/* Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked
- * since it only has load-and-zero. Moreover, at least on some PA processors,
- * the semaphore address has to be 16-byte aligned.
- */
-
static inline int __raw_spin_is_locked(raw_spinlock_t *x)
{
volatile unsigned int *a = __ldcw_align(x);